參數(shù)資料
型號(hào): VT83201
廠商: Vaishali Semiconductor
英文描述: 3.3V Low Phase Noise VCXO Voltage-Controlled Crystal Oscillator and PLL Clock Synthesizer
中文描述: 3.3V的低相位噪聲壓控電壓控制晶體振蕩器和PLL時(shí)鐘合成器
文件頁(yè)數(shù): 4/4頁(yè)
文件大?。?/td> 45K
代理商: VT83201
VT83201
Table 6. AC Electrical Characteristics
2001-04-12
Page
4
MDST-0011-01
www.Vaishali.com
Vaishali Semiconductor 747 Camden Avenue, Suite C Campbell CA 95008 Ph. 408.377.6060 Fax 408.377.6063
T
A
= 0
°
C to +70
°
C, V
DD
= 3.15 V to 3.45 V
Symbol
Fosc
Input Crystal Frequency
tr
Output Clock Rise Time
tf
Output Clock Fall Time
t
od
Output Clock Duty Cycle
tpZL, tpZH
Enable Time. OE to CLK
tpLZ, tpHZ
Disable Time. OE to CLK
t
jit
(pk – pk)
Maximum Absolute Jitter
(Peak to Peak)
Phase Noise, relative to
carrier
Output pullability
Parameter
Condition
0.8 to 2.0V
2.0 to 0.8V
At V
DD
/2
C
L
= 50pf
C
L
= 50pf
Min
10
40
Typ
5
4
±100
Max
20
1.5
1.5
60
6.5
5.5
Units
MHz
ns
ns
%
ns
ns
ps
10 KHz offset
-115
dBc/Hz
0V <V
IN
<3V
±100
ppm
Note:
1. Typical values are at V
DD
= 3.3V and 25°C
Table 7 Pullable Crystal Specifications
Parameter
Value
30 pF
Correlation (load) capacitance
C0/C1
240 max
ESR
35
max
Operating Temperature
0
°
C to +70
°
C
Initial Accuracy
±20 ppm
Temperature + Aging Stability
±50 ppm
Figure 3. External Crystal Connection Block Diagram
Ordering Information
Part Number
Marking
VT83201S1
VT83201S1
VT83201S1X
VT83201S1
VT83201/D
VT83201/DW
Shipping/Packaging
Tubes
Tape & Reel
Dice in waffle packe
Dice in wafer form
No. of Pins
16
16
Package
SOIC
SOIC
Temperature
0
°
C to +70
°
C
0
°
C to +70
°
C
0
°
C to +70
°
C
0
°
C to +70
°
C
XTAL OSC
PLL
CLOCK
GEN
OE
X2
X1
10-20 MHz
Pullable Crystal
Clk 1
Clk
2
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