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參數(shù)資料
| 型號： | VSP3010 |
| 英文描述： | 12-Bit, 12MHz CCD/CIS SIGNAL PROCESSOR |
| 中文描述： | 12位，12MHz的防治荒漠化公約/ CIS信號處理器 |
| 文件頁數(shù)： | 11/16頁 |
| 文件大小： | 199K |
| 代理商： | VSP3010 |
11
VSP3010
In this mode, the CDS becomes a CIS signal processing
circuit (acting like a track-and-hold). Each CIS signal pro-
cessing circuit consists of a 5-bit PGA (0dB to +13dB) and
an 8-bit offset DAC (+50mV to –150mV). A 3-to-1 analog
MUX follows the CIS signal processing circuits and feeds a
high performance 12-bit A/D converter. The analog MUX is
not cycling between channels in this mode. Instead, the
analog MUX is connected to a specific channel, depending
on the data in the Configuration Register.
As specified in the “1-Channel CIS Mode” timing diagram,
the active period of CK1 (t
CK1B
) must be in the LOW period
of ADCCK. If it is in the HIGH period of ADCCK, the
VSP3010 will not function properly.
ANALOG PGA
There is one analog PGA on each channel. Each analog PGA
is controlled by a 5-bit PGA gain register. The analog PGA
gain varies from 1 to 4.44 (0dB to +13dB). The transfer
function of the PGA is:
Gain = 4/(4 – 0.1 X)
where X is the integer representation of the 5-bit PGA gain
register. Figure 1 shows the PGA transfer function plot.
CHOOSING AC INPUT COUPLING CAPACITORS
The purpose of the input coupling capacitor is to isolate the
DC output of the CCD array from affecting the VSP3010.
The internal clamping circuitry restores the necessary DC
component to the CCD output signal. The internal clamp
voltage, V
CLAMP
, is derived from the reference. V
CLAMP
depends on the value of V
REF
; if V
REF
is set to 1V, V
CLAMP
is 2.5V and if V
REF
is set to 1.5V, V
CLAMP
is 3V. There are
many factors that determine the size of the input coupling
capacitors including CCD signal swing, voltage droop across
the input capacitor since the last clamp interval, leakage
current of the VSP3010 input circuitry, and the time period
of CK1. Figure 2 shows a simplified equivalent circuit of the
VSP3010 inputs. In this equivalent circuit, the input cou-
pling capacitor, C
IN
, and the sampling capacitor, C
1
, are
constructed as a capacitor divider (during CK1). For AC
analysis, op amp inputs are grounded. Therefore, the sam-
pling voltage, V
S
(during CK1) is:
V
S
= (C
IN
/C
IN
+ C
1
)) V
IN
From this equation, we see that a larger value of C
IN
makes
V
S
closer to V
IN
. In other words, the input signal V
IN
will be
attenuated less if C
IN
is large. However, there is a disadvan-
tage to using a large value of C
IN
: the larger the C
IN
, the
more dummy or optical black pixels must be used to restore
the DC component of the input signal.
C
1
4pF
C
2
4pF
C
IN
V
S
V
CLAMP
OP
AMP
CK1
CK2
CLP
V
IN
CK1
FIGURE 2. Equivalent Circuit of VSP3010 Inputs.
CHOOSING C
MAX
AND C
MIN
As mentioned previously, a large C
IN
is preferable if there is
enough time for the CLP signal to charge up C
IN
. Typically,
0.01
μ
F to 0.1
μ
F of C
IN
can be used for most cases. In order
to optimize C
IN
, the following two equations can be used to
calculate C
MAX
and C
MIN
:
C
MAX
= ( t
CK1
N)/[R
SW
l
n
(V
D
/V
ERROR
)]
where, t
CK1
is the time when both CK1 and CLP are HIGH
and N is the number of black pixels, R
SW
is the total switch
FIGURE 1. PGA Transfer Function Plot.
PGA TRANSFER FUNCTION
0
5
10
PGA Gain Setting
15
20
25
31
0
5
10
PGA Gain Setting
15
20
25
31
G
4.5
4.0
3.5
3.0
2.5
2.0
1.5
1.0
PGA TRANSFER FUNCTION
G
14
12
10
8
6
4
2
0
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| VSP3010Y | 12-Bit, 12MHz CCD/CIS SIGNAL PROCESSOR |
| VSP3100 | 14-Bit, 10MHz CCD/CIS SIGNAL PROCESSOR |
| VSP3100Y | 14-Bit, 10MHz CCD/CIS SIGNAL PROCESSOR |
| VSP3200 | CCD SIGNAL PROCESSOR FOR SCANNER APPLICATIONS |
| VSP3200Y | CCD SIGNAL PROCESSOR FOR SCANNER APPLICATIONS |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| VSP3010Y | 功能描述:視頻模擬/數(shù)字化轉(zhuǎn)換器集成電路 12-Bit 12Msps CCD/ CIS Signal Processor RoHS:否 制造商:Texas Instruments 輸入信號類型:Differential 轉(zhuǎn)換器數(shù)量:1 ADC 輸入端數(shù)量:4 轉(zhuǎn)換速率:3 Gbps 分辨率:8 bit 結(jié)構(gòu): 輸入電壓:3.3 V 接口類型:SPI 信噪比: 電壓參考: 電源電壓-最大:3.45 V 電源電壓-最小:3.15 V 最大功率耗散: 最大工作溫度:+ 85 C 最小工作溫度:- 40 C 封裝 / 箱體:TCSP-48 封裝:Reel |
| VSP3010Y/2K | 功能描述:視頻模擬/數(shù)字化轉(zhuǎn)換器集成電路 12-Bit 12Msps CCD/ CIS Signal Processor RoHS:否 制造商:Texas Instruments 輸入信號類型:Differential 轉(zhuǎn)換器數(shù)量:1 ADC 輸入端數(shù)量:4 轉(zhuǎn)換速率:3 Gbps 分辨率:8 bit 結(jié)構(gòu): 輸入電壓:3.3 V 接口類型:SPI 信噪比: 電壓參考: 電源電壓-最大:3.45 V 電源電壓-最小:3.15 V 最大功率耗散: 最大工作溫度:+ 85 C 最小工作溫度:- 40 C 封裝 / 箱體:TCSP-48 封裝:Reel |
| VSP3010Y/2KG4 | 功能描述:視頻模擬/數(shù)字化轉(zhuǎn)換器集成電路 12-Bit 12Msps CCD/ CIS Signal Processor RoHS:否 制造商:Texas Instruments 輸入信號類型:Differential 轉(zhuǎn)換器數(shù)量:1 ADC 輸入端數(shù)量:4 轉(zhuǎn)換速率:3 Gbps 分辨率:8 bit 結(jié)構(gòu): 輸入電壓:3.3 V 接口類型:SPI 信噪比: 電壓參考: 電源電壓-最大:3.45 V 電源電壓-最小:3.15 V 最大功率耗散: 最大工作溫度:+ 85 C 最小工作溫度:- 40 C 封裝 / 箱體:TCSP-48 封裝:Reel |
| VSP3010YG4 | 功能描述:視頻模擬/數(shù)字化轉(zhuǎn)換器集成電路 12-Bit 12Msps CCD/ CIS Signal Processor RoHS:否 制造商:Texas Instruments 輸入信號類型:Differential 轉(zhuǎn)換器數(shù)量:1 ADC 輸入端數(shù)量:4 轉(zhuǎn)換速率:3 Gbps 分辨率:8 bit 結(jié)構(gòu): 輸入電壓:3.3 V 接口類型:SPI 信噪比: 電壓參考: 電源電壓-最大:3.45 V 電源電壓-最小:3.15 V 最大功率耗散: 最大工作溫度:+ 85 C 最小工作溫度:- 40 C 封裝 / 箱體:TCSP-48 封裝:Reel |
| VSP3100 | 制造商:BB 制造商全稱:BB 功能描述:14-Bit, 10MHz CCD/CIS SIGNAL PROCESSOR |
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