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參數(shù)資料
| 型號(hào)： | VSC9210 |
| 廠商： | VITESSE SEMICONDUCTOR CORP |
| 元件分類： | 網(wǎng)絡(luò)接口 |
| 英文描述： | 2.5Gb/s SONET/SDH FEC Encoder and Decoder |
| 中文描述： | DATACOM, REED-SOLOMON ENCODER/DECODER, PQFP208 |
| 封裝： | HEAT SINK, PLASTIC, QFP-208 |
| 文件頁數(shù)： | 1/2頁 |
| 文件大?。?/td> | 982K |
| 代理商： | VSC9210 |
www.vitesse.com
Product
Brief
2.5Gb/s SONET/SDH FEC Encoder and Decoder
VSC9210
Optical
Transport
Networking
Telecom Division
Product Description
The VSC9210 provides forward error
correction for any data rate and pro-
tocol operating up to 2.5Gb/s using a
block oriented Reed-Solomon For-
ward Error Correction (FEC) algorithm
RS(255,241). The device can be con-
figured as a FEC encoder or a FEC
decoder utilizing two 16-bit differen-
tial PECL I/O ports to interface with
an external high speed multiplexer/
demultiplexer pair. Clock dividers are
provided on chip to facilitate control
of external PLL circuitry.
For the Encoder, the 1:16
Demultiplexer is used to convert the
incoming 2.5Gb/s STS-48 information
to a 16 bit parallel data at 155MHz to
interface with the VSC9210. After the
encoding process, the 16 bit parallel out-
put data from the VSC9210 is obtained
at 165MHz and is converted to a
2.65Gb/s data stream using the 16:1
Multiplexer. In the case of the Decoder
configuration, the Demultiplexer oper-
ates on a 2.65Gb/s data stream while
the Multiplexer provides the 2.5Gb/s
STS-48 information stream. Clock divid-
ers are incorporated within the
VSC9210 to provide control of an ex-
ternal PLL circuit for synthesizing the
necessary reference clock for the Mul-
tiplexer. In the case of the Bypass mode,
the input and output rates are identical
and both the Multiplexer and
Demultiplexer operate at 2.5Gb/s.
Features:
Reed Solomon RS(255,241)
Codec
Bit Error Rate Improvement
from 10
5
to 10
20
Includes Optical Channel
Overhead (OCh-OH) of 10Mb/s
Provides Bit Error Rate
Monitoring of FEC Line
Processes Data Rates up to
2.654Gb/s and Information
Rates to 2.488Gb/s
Provides a Dedicated User
Defined Data Channel at
10.368Mb/s
Benefits:
Device Pin Configured as
Stand-alone Encoder, Decoder,
or Bypass with Cocks Disabled
Provides Count of Correctable
0’s and 1’s that are in Error in
Prior Code Word
Interfaces Directly with Vitesse
OC-48 Rate Components
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相關(guān)代理商/技術(shù)參數(shù) |
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|---|---|
| VSC9271 | 制造商:VITESSE 制造商全稱:Vitesse Semiconductor Corporation 功能描述:10GB/s Multi-Rate Bi-directional FEC Device with Digital Wrapper and Performance Monitor |
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| VSC9292 | 制造商:VITESSE 制造商全稱:Vitesse Semiconductor Corporation 功能描述:340 Gbps (136 x 136) and 170 Gbps (68 x68) TSI Switches with Dual Rate (2.5G/622M) I/O |
| VSC9295 | 制造商:VITESSE 制造商全稱:Vitesse Semiconductor Corporation 功能描述:340 Gbps (136 x 136) and 170 Gbps (68 x68) TSI Switches with Dual Rate (2.5G/622M) I/O |
| VSC9295XSM | 制造商:Vitesse Semiconductor Corporation 功能描述:CHIPSET |
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