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參數(shù)資料
| 型號(hào)： | VRG8692-S |
| 元件分類： | 可調(diào)正電壓?jiǎn)温份敵鯨DO穩(wěn)壓器 |
| 英文描述： | 1 V-3.3 V ADJUSTABLE POSITIVE LDO REGULATOR, 0.5 V DROPOUT, MDFM12 |
| 封裝： | 1 X 0.900 INCH, 0.220 INCH HEIGHT, HERMETIC SEALED, METAL, PACKAGE-12 |
| 文件頁數(shù)： | 8/10頁 |
| 文件大?。?/td> | 225K |
| 代理商： | VRG8692-S |
7
SCD8691 Rev E 6/14/10
Aeroflex Plainview
FIGURE 6 – SLOW START
VRG8691/92
VIN
VOUT
VSENSE
R1
R2
VREF (=1V)
CURR. LIMIT
10
11
12
4
3
2
1
8
ENABLE
6
9
IADJ
7
5
CLOAD
0.1F
47F
+
10F
VBIAS
SLOW START
VOUT
VBIAS
VIN
GND
0.1F
+
0
CSS
+
ENABLE
If it is desirable to control the output rise time, a capacitor (CSS) can be asserted on the Slow Start pin to adjust the rise
time for the following:
A. Large load capacitance will cause high surge currents which will trip the current limit circuitry.
The use of CSS will allow the output voltage to rise slowly thus mitigate the surge current phenomenon.
B. CSS may be used solely to control VOUT RISE TIME (Tr), when CLOAD is not an issue.
C. CSS is effective only when VIN is applied prior to VBIAS or ENABLE.
>
CSS
CLOAD
0.4 X VBIAS
1300
X
VOUT NOM
ICL - ILOAD NOM
Note: CSS in Farads and TR in seconds.
TR =
VBIAS
VBIAS - 2.5
()
CSS X 1300 X LN
APPLICATION NOTE 4
VOUT START UP RISE TIME CONTROL
Utilizing the Slow Start option:
When the VRG8691/92 is first powered up, using the Slow Start function controls the rate at which VOUT rises to the
required voltage set by R1 and R2.
Note: VIN should be applied before VBIAS when the Slow Start feature is used.
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