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參數資料
| 型號： | VN750 |
| 廠商： | 意法半導體 |
| 英文描述： | HIGH SIDE DRIVER |
| 中文描述： | 高邊驅動器 |
| 文件頁數： | 8/15頁 |
| 文件大?。?/td> | 118K |
| 代理商： | VN750 |
8/15
VN750 / VN750S / VN750-B5
1
GND
REVERSE BATTERY
Solution 1: Resistor in the ground line (R
GND
only). This
can be used withany type of load.
The following is an indication on how to dimension the
R
GND
resistor.
1) R
GND
≤
600mV / (I
S(on)max
).
2) R
GND
≥
(
V
CC
) / (-I
GND
)
where -I
is theDC reverse groundpin currentand can
be found in the absolute maximum rating section of the
device’s datasheet.
Power Dissipation in R
GND
(when V
CC
<0: during reverse
battery situations) is:
P
D
= (-V
CC
)
2
/R
GND
This resistor can be shared amongst several different
HSD. Please note that the value of this resistor should be
calculated with formula (1) where I
becomes the
sum of the maximum on-state currents of the different
devices.
Please note that if the microprocessor ground is not
common with the device ground then the R
will
produce a shift (I
* R
) in the input thresholds
and the status output values. This shift will vary
depending on many devices are ON in the case of several
high side drivers sharing the sameR
GND
.
If thecalculated power dissipation leads to a large resistor
or several devices have to share the same resistor then
the ST suggests to utilize Solution 2 (see below).
Solution 2: A diode (D
GND
) in the ground line.
A resistor (R
=1k
)
should be inserted in parallel to
D
GND
if the device will be driving an inductive load.
PROTECTION
NETWORK
AGAINST
This small signal diode can be safely shared amongst
several different HSD. Also in this case, the presence of
the ground network will produce a shift (
j
600mV) in the
input threshold and the status output values if the
microprocessor ground is not common with the device
ground. This shift will not vary if more than one HSD
shares the same diode/resistor network.
LOAD DUMP PROTECTION
D
is necessary (Transil or MOV) if the load dump peak
voltage exceeds V
max DC rating. The same applies if
the devicewill be subject totransients on the V
line that
are greater than the ones shown in the ISO T/R 7637/1
table.
μ
C I/Os PROTECTION:
If a ground protection network is used and negative
transients arepresent on the V
line, the control pins will
be pulled negative. ST suggests toinsert a resistor (R
prot
)
in line to prevent the
μ
C I/Os pins to latch-up.
The value ofthese resistors is acompromise between the
leakage current of
μ
C and the current required by the
HSD I/Os (Inputlevels compatibility) with thelatch-up limit
of
μ
C I/Os.
-V
CCpeak
/I
latchup
≤
R
prot
≤
(V
OH
μ
C
-V
IH
-V
GND
) / I
IHmax
Calculation example:
For V
CCpeak
= - 100V and I
latchup
≥
20mA; V
OH
μ
C
≥
4.5V
5k
≤
R
prot
≤
65k
.
Recommended R
prot
value is 10k
.
1
APPLICATION SCHEMATIC
V
CC
GND
OUTPUT
D
GND
R
GND
D
ld
μ
C
+5V
R
prot
V
GND
STATUS
INPUT
+5V
R
prot
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