參數(shù)資料
型號(hào): VN1550
廠商: Supertex, Inc.
英文描述: N-Channel Enhancement-Mode Vertical DMOS FETs
中文描述: N溝道增強(qiáng)型場(chǎng)效應(yīng)管垂直的DMOS
文件頁數(shù): 2/2頁
文件大小: 431K
代理商: VN1550
2
VN1550
Switching Waveforms and Test Circuit
90%
10%
90%
90%
10%
10%
PULSE
GENERATOR
V
DD
R
L
OUTPUT
D.U.T.
t
(ON)
t
d(ON)
t
(OFF)
t
d(OFF)
t
F
t
r
INPUT
INPUT
OUTPUT
10V
V
DD
R
gen
0V
0V
Symbol
Parameter
Drain-to-Source
Breakdown Voltage
Min
Typ
Max
Unit
Conditions
BV
DSS
500
V
V
GS
= 0V, I
D
= 1mA
V
GS(th)
V
GS(th)
I
GSS
I
DSS
Gate Threshold Voltage
2
4
V
V
GS
= V
DS
, I
D
= 1mA
V
GS
= V
DS
, I
D
= 1mA
V
GS
=
±
20V, V
DS
= 0V
V
GS
= 0V, V
DS
= Max Rating
V
GS
= 0V, V
DS
= 0.8 Max Rating
T
A
= 125
°
C
V
GS
= 5V, V
DS
= 25V
V
GS
= 10V, V
DS
= 25V
V
GS
= 5V, I
D
= 50mA
V
GS
= 10V, I
D
= 50mA
V
GS
= 10V, I
D
= 50mA
V
DS
= 25V, I
D
= 50mA
Change in V
GS(th)
with Temperature
Gate Body Leakage
-3.8
-5.0
mV/
°
C
nA
100
Zero Gate Voltage Drain Current
10
μ
A
mA
1
I
D(ON)
ON-State Drain Current
100
150
350
R
DS(ON)
45
40
60
R
DS(ON)
G
FS
C
ISS
C
OSS
C
RSS
t
d(ON)
t
r
t
d(OFF)
t
f
V
SD
t
rr
Notes:
1. All D.C. parameters 100% tested at 25
°
C unless otherwise stated. (Pulse test: 300
μ
s pulse, 2% duty cycle.)
2. All A.C. parameters sample tested.
Change in R
DS(ON)
with Temperature
Forward Transconductance
1
1.7
%/
°
C
m
50
100
Input Capacitance
45
55
Common Source Output Capacitance
8
10
pF
Reverse Transfer Capacitance
2
5
Turn-ON Delay Time
10
Rise Time
15
Turn-OFF Delay Time
10
Fall Time
10
Diode Forward Voltage Drop
0.8
V
V
GS
= 0V, I
SD
= 0.5A
V
GS
= 0V, I
SD
= 0.5A
Reverse Recovery Time
300
ns
Electrical Characteristics
(@ 25
°
C unless otherwise specified)
Static Drain-to-Source
ON-State Resistance
mA
V
GS
= 0V, V
DS
= 25V
f = 1 MHz
V
DD
= 25V,
I
D
= 150mA,
R
GEN
= 25
ns
1235 Bordeaux Drive, Sunnyvale, CA 94089
TEL: (408) 744-0100 FAX: (408) 222-4895
www.supertex.com
01/14/02
2001 Supertex Inc. All rights reserved. Unauthorized use or reproduction prohibited.
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