參數(shù)資料
型號(hào)： VIC068A-GMB
廠商： CYPRESS SEMICONDUCTOR CORP
元件分類： 總線控制器
英文描述： VMEbus Interface Controller
中文描述： VME BUS CONTROLLER, CPGA145
封裝： CAVITY-UP, CERAMIC, PGA-145
文件頁(yè)數(shù)： 1/15頁(yè)
文件大?。?/td> 280K
代理商： VIC068A-GMB
VMEbus Interface Controller
VIC068A
Cypress Semiconductor Corporation
3901 North First Street
San Jose
CA 95134
408-943-2600
December 1990 - Revised July 23, 1997
Features
Complete VMEbus interface controller and arbiter
—58 internal registers provide configuration control
and status of VMEbus and local operations
—Drives arbitration, interrupt, address modifier utility,
strobe, address lines A07 through A01 and data lines
D07 through D00 directly, and provides signals for
control logic to drive remaining address and data
lines
—Direct connection to 68xxx family and mappable to
non-68xxx processors
Complete master/slave capability
—Supports read, write, write posting, and block trans-
fers
—Accommodates VMEbus timing requirements with
internal digital delay line (
1
2
-clock granularity)
—Programmable metastability delay
—Programmable data acquisition delays
—Provides timeout timers for local bus and VMEbus
transactions
Interleaved block transfers over VMEbus
—Acts as DMA master on local bus
—Programmable burst count, transfer length, and in-
terleaved period interval
— Supports local module-based DMA
Arbitration support
—Supports single-level, priority and round robin arbi-
tration
—Supports fair request option as requester
Interrupt support
—Complete support for the VMEbus interrupts: inter-
rupter and interrupt handler
—Seven local interrupt lines
—8-level interrupt priority encode
—Total of 29 interrupts mapped through the VIC068A
Miscellaneous features
—Refresh option for local DRAM
—Four broadcast location monitors
—Four module-specific location monitors
—Eight interprocessor communications registers
—PGA or QFP packages
—Compatible with IEEE Specification 1014, Rev. C
—Supports RMC operations
See the VMEbus Interface Handbook or more informa-
tion
Functional Description
The VMEbus interface controller (VIC068A) is a single chip
designed to minimize the cost and board area requirements
and to maximize performance of the VMEbus interface of a
VMEbus master/slave module. This can be implemented on
VIC068A either an 8-bit, 16-bit, or 32-bit VMEbus system. The
VIC068A performs all VMEbus system controller functions
plus many others, which simplify the development of
VIC068Aa VMEbus interface. The VIC068A utilizes patented
on-chip output buffers. These CMOS high-drive buffers pro-
vide direct connection to the address and data lines. In addi-
tion to these signals, the VIC068A connects directly to the ar-
bitration, interrupt, address modifier, utility and strobe lines.
Signals are provided which control data direction and latch
functions needed for a 32-bit implementation.
The VIC068A was developed through the efforts of a consor-
tium of board vendors, under the auspices of the VMEbus In-
ternational Trade Association (VITA). The VIC068A thus in-
sures compatibility between boards designed by different
manufacturers.
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