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參數(shù)資料
| 型號(hào)： | V62C2802048LL-100T |
| 廠商： | Mosel Vitelic, Corp. |
| 元件分類(lèi)： | SRAM |
| 英文描述： | Ultra Low Power 256K x 8 CMOS SRAM |
| 中文描述： | 超低功耗256K × 8 CMOS SRAM的 |
| 文件頁(yè)數(shù)： | 1/10頁(yè) |
| 文件大?。?/td> | 94K |
| 代理商： | V62C2802048LL-100T |
V 62C2802048L(L)
Ultra Low Power
256K x 8 CMOS SRAM
Features
Low-power consumption
- Active: 35mA at 55ns
- Stand-by: 10
μ
A
(CMOS input/output)
2
μ
A
CMOS input/output, L version
Single +2.2 to 2.7V Power Supply_Typical
Extented Voltage from 2.2 to 3.6V.
Equal access and cycle time
55/70/85/100 ns access time
Easy memory expansion with CE1, CE2
and OE inputs
1.0V data retention mode
TTL compatible, Tri-state input/output
Automatic power-down when deselected
Package available: 32L TSOP(I)/ STSOP(I)
48 Ball CSP_BGA
Functional Description
The V62C2802048L is a low power CMOS Static RAM
organized as 262,144 words by 8 bits. Easy memory exp-
ansion is provided by an active LOW CE1, an active
HIGH CE2, an active LOW OE, and Tri-state I/O’s. This
device has an automatic power-down mode feature when
deselected.
Writing to the device is accomplished by taking Chip
Enable 1 (CE1) with Write Enable (WE) LOW, and Chip
Enable 2 (CE2) HIGH. Reading from the device is per-
formed by taking Chip Enable 1 (CE1) with Output
Enable (OE) LOW while Write Enable (WE) and Chip
Enable 2 (CE2) is HIGH. The I/O pins are placed in a
high-impedance state when the device is deselected: the
outputs are disabled during a write cycle.
TheV62C2802048LL comes with a 1V data retention fe-
ature and Lower Standby Power. The V62C2802048L is
avalable in a 32-pin 8 x 20 mm TSOP1 / STSOP 8x13.4 mm
and CSP type 48-fpBGA packages.
32-Pin TSOP1 / STSOP
(CSP_BGA See next page)
Logic Block Diagram
Cell Array
R
S
INPUT BUFFER
COLUMN DECODER
CONTROL
CIRCUIT
I/O8
I/O1
OE
WE
CE1
CE2
A
8
A9
A
7
A
6
A
5
A
4
A
3
A
2
A
1
A
0
A
10
A
11
A
12
A
13
A
14
A
15
A
16
A
17
1
2
3
4
5
6
7
8
9
16
15
14
13
12
11
10
A
8
A
13
WE
CE
2
A
15
Vcc
A17
A
16
A
14
A
12
A
7
A
6
A
5
A
4
A
9
A
11
32
31
30
29
28
27
26
25
24
23
17
18
19
20
21
22
CE1
I/O
8
I/O
7
I/O
6
I/O
5
I/O
4
GND
I/O
3
I/O
2
I/O
1
A
0
A
1
A
2
A
3
A
10
OE
REV. 1.
2
May
2001 V62C
2
8020
48
L(L)
1
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相關(guān)代理商/技術(shù)參數(shù) |
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|---|---|
| V62C2802048LL-55T | 制造商:MOSEL 制造商全稱(chēng):MOSEL 功能描述:Ultra Low Power 256K x 8 CMOS SRAM |
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| V62C2804096 | 制造商:MOSEL 制造商全稱(chēng):MOSEL 功能描述:512K X 8, CMOS STATIC RAM |
| V62C3161024L | 制造商:MOSEL 制造商全稱(chēng):MOSEL 功能描述:Ultra Low Power 64K x 16 CMOS SRAM |
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