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參數(shù)資料
| 型號： | V62C2162048L |
| 廠商： | Mosel Vitelic, Corp. |
| 英文描述： | Ultra Low Power 128K x 16 CMOS SRAM |
| 中文描述： | 128K的超低功耗× 16 CMOS SRAM的 |
| 文件頁數(shù)： | 11/13頁 |
| 文件大?。?/td> | 117K |
| 代理商： | V62C2162048L |
V62C2162048L(L)
11
Notes
(Write Cycle)
1. L-version includes this feature.
2. This Parameter is samples and not 100% tested.
3. For test conditions, see
AC Test Condition
, Figure A.
4. This parameter is tested with CL = 5pF as shown in Figure B. Transition is measured + 500mV from steady-state voltage.
5. This parameter is guaranteed, but is not tested.
6. WE is High for read cycle.
7. CE and OE are LOW for read cycle.
8. Address valid prior to or coincident with CE transition LOW.
9. All read cycle timings are referenced from the last valid address to the first transtion address.
10. CE or WE must be HIGH during address transition.
11. All write cycle timings are referenced from the last valid address to the first transition address.
Data Retention Mode
V
DR
>
2.0V
Vcc_typ
V
IH
V
IH
V
DR
V
CC
CE
t
R
t
CDR
Vcc_typ
Data Retention Waveform
(L Version Only) (T
A
= 0
0
C to +70
0
C / -40
0
C to +85
0
C)
Data Retention Characteristics
(L Version Only)
(1)
Parameter
Symbol
Test Condition
Min
Max
Unit
V
CC
for Data Retention
V
DR
CE > V
CC
- 0.2V
2.0
-
V
Data Retention Current
I
CCDR
-
1
μ
A
Chip Deselect to Data Retention Time
t
CDR
V
IN
> V
CC
- 0.2V or
0
-
ns
Operation Recovery Time
(2)
t
R
V
IN
< 0.2V
t
RC
-
ns
REV. 1.
3
OCT
2001 V62C
2
1620
48
L(L)
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| V62C2162048L-100B | 制造商:MOSEL 制造商全稱:MOSEL 功能描述:Ultra Low Power 128K x 16 CMOS SRAM |
| V62C2162048L-100T | 制造商:MOSEL 制造商全稱:MOSEL 功能描述:Ultra Low Power 128K x 16 CMOS SRAM |
| V62C2162048L-35B | 制造商:MOSEL 制造商全稱:MOSEL 功能描述:Ultra Low Power 128K x 16 CMOS SRAM |
| V62C2162048L-35T | 制造商:MOSEL 制造商全稱:MOSEL 功能描述:Ultra Low Power 128K x 16 CMOS SRAM |
| V62C2162048L-45B | 制造商:MOSEL 制造商全稱:MOSEL 功能描述:Ultra Low Power 128K x 16 CMOS SRAM |
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