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參數(shù)資料
| 型號： | V62/03633-01XE |
| 廠商： | TEXAS INSTRUMENTS INC |
| 元件分類： | 模擬信號調(diào)理 |
| 英文描述： | SPECIALTY ANALOG CIRCUIT, PDSO16 |
| 封裝： | GREEN, PLASTIC, SOIC-16 |
| 文件頁數(shù)： | 10/13頁 |
| 文件大小： | 549K |
| 代理商： | V62/03633-01XE |
UC2832-EP
PRECISION LOW DROPOUT LINEAR CONTROLLER
SGLS147A – JANUARY 2003 – REVISED MARCH 2003
6
POST OFFICE BOX 655303
DALLAS, TEXAS 75265
APPLICATION AND OPERATION INFORMATION
Estimating Maximum Load Capacitance
For any power supply, the rate at which the total output capacitance can be charged depends on the maximum
output current available and on the nature of the load. For a constant-current current-limited power supply, the
output will come up if the load asks for less than the maximum available short-circuit limit current.
To ensure recovery of a duty-ratio current-limited power supply from a short-circuited load condition, there is
a maximum total output capacitance which can be charged for a given unit ON time. The design value of ON
time can be adjusted by changing the timing capacitor. Nominally, TON = 0.693 x 10 k x CT.
Typically, the IC regulates output current to a maximum of IMAX = K x ITH, where ITH is the timer trip-point current,
and
K
+
Current Sense Amplifier Offset Voltage
100 mA
and is variable from 1.35 to 3.05 with VADJ.
For a worst-case constant-current load of value just less than ITH, CMAX can be estimated from:
C
MAX +
K
* 1
TH
T
ON
V
OUT
where VOUT is the nominal regulator output voltage.
For a resistive load of value RL, the value of CMAX can be estimated from:
C
MAX +
T
ON
R
L
1
In
1
*
V
OUT
K
I
TH
R
L
–1
320
280
260
240
220
200
180
160
300
140
120
Offset
V
oltage
–
mV
0
0.25
0.75
1
1.25
1.5
1.75
2
2.5
2.25
VADJ (Pin 11) – V
Figure 2. Current Sense Amplifier Offset Voltage vs VADJ
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