
CD74HC4051-EP
ANALOG MULTIPLEXER/DEMULTIPLEXER
SCLS464 – SEPTEMBER 2002
1
POST OFFICE BOX 655303
DALLAS, TEXAS 75265
D Controlled Baseline
– One Assembly/Test Site, One Fabrication
Site
D Extended Temperature Performance of
–55
°C to 125°C
D Enhanced Diminishing Manufacturing
Sources (DMS) Support
D Enhanced Product Change Notification
D Qualification Pedigree
D Wide Analog Input Voltage Range of
±5 V Max
D Low ON Resistance
– 70
Typical (VCC – VEE = 4.5 V)
– 40
Typical (VCC – VEE = 9 V)
Component qualification in accordance with JEDEC and industry
standards to ensure reliable operation over an extended
temperature range. This includes, but is not limited to, Highly
Accelerated Stress Test (HAST) or biased 85/85, temperature
cycle, autoclave or unbiased HAST, electromigration, bond
intermetallic life, and mold compound life. Such qualification
testing should not be viewed as justifying use of this component
beyond specified performance and environmental limits.
D Low Crosstalk Between Switches
D Fast Switching and Propagation Speeds
D Break-Before-Make Switching
D Operation Control Voltage = 2 V to 6 V
D Switch Voltage = 0 V to 10 V
D High Noise Immunity NIL = 30%, NIH = 30%
of VCC, VCC = 5 V
description
This device is a digitally controlled analog switch that utilizes silicon gate CMOS technology to achieve operating
speeds similar to LSTTL, with the low power consumption of standard CMOS integrated circuits.
This analog multiplexer/demultiplexer controls analog voltages that may vary across the voltage supply range
(i.e., VCC to VEE). These bidirectional switches allow any analog input to be used as an output and vice versa.
The switches have low ON resistance and low OFF leakages. In addition, the device has an enable control (E)
that, when high, disables all switches to their OFF state.
ORDERING INFORMATION
TA
PACKAGE
ORDERABLE
PART NUMBER
TOP-SIDE
MARKING
–55
°C to 125°C
SOIC – M
Tape and reel
CD74HC4051MM96EP
HC4051MEP
Package drawings, standard packing quantities, thermal data, symbolization, and PCB design
guidelines are available at www.ti.com/sc/package.
Copyright
2002, Texas Instruments Incorporated
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of Texas Instruments
standard warranty. Production processing does not necessarily include
testing of all parameters.
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
M PACKAGE
(TOP VIEW)
1
2
3
4
5
6
7
8
16
15
14
13
12
11
10
9
CHANNEL I/O A4
CHANNEL I/O A6
COM OUT/IN A
CHANNEL I/O A7
CHANNEL I/O A5
E
VEE
GND
VCC
CHANNEL I/O A2
CHANNEL I/O A1
CHANNEL I/O A0
CHANNEL I/O A3
ADDRESS SEL S0
ADDRESS SEL S1
ADDRESS SEL S2