參數(shù)資料
型號(hào)： V54C3256404VDUG7
廠商： PROMOS TECHNOLOGIES INC
元件分類： DRAM
英文描述： 64M X 4 SYNCHRONOUS DRAM, 5.4 ns, PBGA54
封裝： ROHS COMPLIANT, MO-210, FBGA-54
文件頁數(shù)： 10/56頁
文件大?。?/td> 719K
代理商： V54C3256404VDUG7
18
V54C3256(16/80/40)4VD Rev. 1.9 August 2008
ProMOS TECHNOLOGIES
V54C3256(16/80/40)4VD
AC Characteristics 1,2, 3
TA = 0 to 70 °C; VSS = 0 V; VDD = (3.0V~3.3 V) ± 0.3 V, tT = 1 ns
#
Symbol
Parameter
Limit Values
Unit
Note
-6
-7PC
-7
Min.
Max.
Min.
Max.
Min.
Max.
Clock and Clock Enable
1tCK
Clock Cycle Time
CAS Latency = 3
CAS Latency = 2
6
7.5
–
7
7.5
–
7
10
–
s
ns
2tCK
Clock Frequency
CAS Latency = 3
CAS Latency = 2
–
166
133
–
143
133
–
143
100
MHz
3tAC
Access Time from Clock
CAS Latency = 3
CAS Latency = 2
–
_
5.4
–
_
5.4
–
_
5.4
6
ns
2, 4
4tCH
Clock High Pulse Width
2.5
–
2.5
–
2.5
–
ns
5tCL
Clock Low Pulse Width
2.5
–
2.5
–
2.5
–
ns
6tT
Transition Tim
0.3
1.2
0.3
1.2
0.3
1.2
ns
Setup and Hold Times
7tIS
Input Setup Time
1.5
–
1.5
–
1.5
–
ns
5
8tIH
Input Hold Time
0.8
–
0.8
–
0.8
–
ns
5
9tCKS
CKE Setup Time
1.5–1.5–1.5
–
ns
5
10
tCKH
CKE Hold Time
0.8–0.8–0.8
–
ns
5
11
tRSC
Mode Register Set-up Time
12
–
14
–
14
–
ns
12
tSB
Power Down Mode Entry Time
0
6
0
7
0
7
ns
13
tDS
Data-in setup time
1.5
–
1.5
–
1.5
–
ns
14
tDH
Data-in hold time
0.8
–
0.8
–
0.8
–
ns
Common Parameters
15
tRCD
Row to Column Delay Time
15
–
15
–
15
–
ns
6
16
tRP
Row Precharge Time
15
–
15
–
15
–
ns
6
17
tRAS
Row Active Time
40
100K
42
100K
42
100K
ns
6
18
tRC
Row Cycle Time
60
–
60
–
60
–
ns
6
19
tRRD
Activate(a) to Activate(b) Command Period
12
–
14
–
14
–
ns
6
20
tCCD
CAS(a) to CAS(b) Command Period
1
–
1
–
1
–
CLK
21
tDPL
Data-in to Precharge Command for Manual
precharge
2
–2–
2–
CLK
Refresh Cycle
22
tREF
Refresh Period (8192 cycles)
—
64
—
64
—
64
ms
23
tSREX
Self Refresh Exit Time
1
—
1
—
1
—
CLK
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參數(shù)描述
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V54C3256804VAB 制造商:MOSEL 制造商全稱:MOSEL 功能描述:256Mbit SDRAM 3.3 VOLT, TSOP II / SOC BGA / WBGA PACKAGE 16M X 16, 32M X 8, 64M X 4
V54C3256804VAT 制造商:MOSEL 制造商全稱:MOSEL 功能描述:256Mbit SDRAM 3.3 VOLT, TSOP II / SOC BGA / WBGA PACKAGE 16M X 16, 32M X 8, 64M X 4
V54C3256804VB 制造商:MOSEL 制造商全稱:MOSEL 功能描述:256Mbit SDRAM 3.3 VOLT, TSOP II / SOC BGA / WBGA PACKAGE 16M X 16, 32M X 8, 64M X 4
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