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| 型號(hào)： | V54C316162VC-6 |
| 廠商： | Mosel Vitelic, Corp. |
| 英文描述： | 200/183/166/143 MHz 3.3 VOLT, 2K REFRESH ULTRA HIGH PERFORMANCE 1M X 16 SDRAM 2 BANKS X 512Kbit X 16 |
| 中文描述： | 200/183/166/143 MHz的3.3伏和2K刷新超高性能100萬(wàn)× 16 SDRAM的2組X 512Kbit × 16 |
| 文件頁(yè)數(shù)： | 11/21頁(yè) |
| 文件大?。?/td> | 322K |
| 代理商： | V54C316162VC-6 |
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11
V54C316162V Rev. 2.9 September 2001
MOSEL VITELIC
V54C316162V
24
t
SREX
Self Refresh Exit Time
2 CLK + t
RC
2 CLK + t
RC
6
Read Cycle
25
t
OH
Data Out Hold Time
2.5
–
2.5
–
2.5
–
2.5
–
ns
27
t
HZ
CAS Latency = 3
CAS Latency = 2
–
–
5
7
–
–
5.3
7
–
–
5.5
7
–
–
5.5
7
ns
28
t
DQZ
DQM Data Out Disable Latency
2
–
2
–
2
–
2
–
CLK
Write Cycle
29
t
WR
Write Recovery Time
CAS Latency = 3
CAS Latency = 2
5
10
–
–
5.5
10
–
–
6
10
–
–
7
10
–
–
ns
ns
30
t
DQW
DQM Write Mask Latency
0
–
0
–
0
–
0
–
CLK
AC Characteristics
(
1,2,3)
(Continued)
T
A
= 0 to 70
°
C; V
SS
= 0 V; V
CC
= 3.3 V
±
0.3 V, t
T
= 1 ns
#
Symbol Parameter
Limit Values
Unit
-5
-55
-6
-7
Min.
Max.
Min.
Max.
Min.
Max.
Min.
Max.
Notes for AC Parameters:
1.
For proper power-up see the operation section of this data sheet.
2.
AC timing tests have V
IL
= 0.8V and V
IH
= 2.0V with the timing referenced to the 1.4 V crossover point. The transition
time is measured between V
IH
and V
IL
. All ACmeasurements assume t
T
= 1ns with the AC output load circuit shown
in Figure 1.
3.
If clock rising time is longer than 1 ns, a time (t
T
/2
–
0.5) ns has to be added to this parameter.
4.
If t
T
is longer than 1 ns, a time (t
T
–
1) ns has to be added to this parameter.
5.
These parameter account for the number of clock cycle and depend on the operating frequency of the clock, as
follows:
the number of clock cycle = specified value of timing period (counted in fractions as a whole number)
6.
Self Refresh Exit is a synchronous operation and begins on the 2nd positive clock edge after CKE returns high.
Self Refresh Exit is not complete until a time period equal to tRC is satisfied once the Self Refresh Exit command
is registered.
1.4V
1.4V
tCS
tCH
tAC
tAC
tLZ
tOH
tHZ
CLK
COMMAND
OUTPUT
50 pF
I/O
Z=50 Ohm
+ 1.4 V
50 Ohm
VIH
VIL
t
T
Figure 1.
tCK
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| V54C316162VC-7 | 200/183/166/143 MHz 3.3 VOLT, 2K REFRESH ULTRA HIGH PERFORMANCE 1M X 16 SDRAM 2 BANKS X 512Kbit X 16 |
| V54C316162V | MORAY EEL |
| V54C316162V-5 | MORAY EEL |
| V54C316162V-55 | 200/183/166/143 MHz 3.3 VOLT, 4K REFRESH ULTRA HIGH PERFORMANCE 1M X 16 SDRAM 2 BANKS X 512Kbit X 16 |
| V54C316162V-6 | 200/183/166/143 MHz 3.3 VOLT, 4K REFRESH ULTRA HIGH PERFORMANCE 1M X 16 SDRAM 2 BANKS X 512Kbit X 16 |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| V54C316162VC-7 | 制造商:MOSEL 制造商全稱:MOSEL 功能描述:200/183/166/143 MHz 3.3 VOLT, 2K REFRESH ULTRA HIGH PERFORMANCE 1M X 16 SDRAM 2 BANKS X 512Kbit X 16 |
| V54C316162VCT6 | 制造商:MOSEL 功能描述:SOP |
| V54C3256 | 制造商:MOSEL 制造商全稱:MOSEL 功能描述:256Mbit SDRAM 3.3 VOLT, TSOP II / SOC BGA / WBGA PACKAGE 16M X 16, 32M X 8, 64M X 4 |
| V54C3256164VAB | 制造商:MOSEL 制造商全稱:MOSEL 功能描述:256Mbit SDRAM 3.3 VOLT, TSOP II / SOC BGA / WBGA PACKAGE 16M X 16, 32M X 8, 64M X 4 |
| V54C3256164VALT6 | 制造商:MOSEL 制造商全稱:MOSEL 功能描述:256Mbit SDRAM 3.3 VOLT, TSOP II / SOC BGA / WBGA PACKAGE 16M X 16, 32M X 8, 64M X 4 |
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