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參數(shù)資料
| 型號： | V53C1668H |
| 廠商： | Mosel Vitelic, Corp. |
| 英文描述： | High Performance 64K X 16 Bit EDO Page Mode Dual CAS CMOS Dynamic RAM(高性能64Kx16EDO頁面模式雙CAS輸入CMOS動態(tài)RAM) |
| 中文描述： | 高性能64K的× 16位EDO公司頁面模式雙中科院的CMOS動態(tài)RAM（高性能64Kx16EDO頁面模式雙中科院輸入的CMOS動態(tài)內(nèi)存） |
| 文件頁數(shù)： | 1/20頁 |
| 文件大?。?/td> | 160K |
| 代理商： | V53C1668H |
MOSEL V ITELIC
1
V53C1668H
HIGH PERFORMANCE
64K x 16 EDO PAGE MODE
DUAL CAS CMOS DYNAMIC RAM
PRELIMINARY
V53C1668H Rev. 1.1 February 1999
HIGH PERFORMANCE
30
35
40
45
50
Max. RAS Access Time, (t
RAC
)
30 ns
35 ns
40 ns
45 ns
50 ns
Max. Column Address Access Time, (t
CAA
)
16 ns
18 ns
20 ns
22 ns
24 ns
Min. Extended Data Out Page Mode Cycle Time, (t
PC
)
12 ns
14 ns
15 ns
17 ns
19 ns
Min. Read/Write Cycle Time, (t
RC
)
65 ns
70 ns
75 ns
80 ns
90 ns
Features
I
64K x 16-bit organization
I
EDO Page Mode for a sustained data rate
of 83 MHz
I
RAS access time: 30, 35, 40, 45, 50 ns
I
Dual CAS Input
I
Low power dissipation
I
Read-Modify-Write, RAS-Only Refresh,
CAS-Before-RAS Refresh
I
Refresh Interval: 256 cycles/4 ms
I
Available in 40-pin 400 mil SOJ and 40/44L-pin
400 mil TSOP-II packages
I
Single +5V
±
10% Power Supply
I
TTL Interface
Description
The V53C1668H is a 65,536 x 16 bit high-
performance CMOS dynamic random access
memory. The V53C1668H offers Page mode with
Extended Data Output. EDO Page Mode operation
allows random access up to 256 x 16 bits, within a
page, with cycle times as short as 12ns. An
address, CAS and RAS input capacitances are
reduced to minimize the loading. The V53C1668H
has symmetric address, 8-bit row and 8-bit column.
All inputs are TTL compatible. The V53C1668H is
best suited for graphics, and DSP applications
requiring high performance memories.
Device Usage Chart
Operating
Temperature
Range
Package Outline
Access Time (ns)
Power
Temperature
Mark
K
T
30
35
40
45
50
Std.
0
°
C to 70
°
C
Blank
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