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參數(shù)資料
| 型號： | V437464C24V |
| 廠商： | Mosel Vitelic, Corp. |
| 英文描述： | 3.3 VOLT 64M x 72 HIGH PERFORMANCE PC133 REGISTERED PLL ECC SDRAM MODULE |
| 中文描述： | 3.3伏6400 × 72高性能的PC133 ECC的內(nèi)存注冊鎖相環(huán)模塊 |
| 文件頁數(shù)： | 4/12頁 |
| 文件大?。?/td> | 325K |
| 代理商： | V437464C24V |
4
V437464C24V Rev. 1.0 January 2002
MOSEL VITELIC
V437464C24V
Serial Presence Detect Information
A serial presence detect storage device –
E
2
PROM – is assembled onto the module. Informa-
tion about the module configuration, speed, etc. is
SPD-Table
written into the E
2
PROM device during module pro-
duction using a serial presence detect protocol (I
2
C
synchronous 2-wire bus)
Byte Num-
ber
Function Described
SPD Entry Value
Hex Value
-75PC
-75
-10PC
0
Number of SPD bytes
128
80
80
80
1
Total bytes in Serial PD
256
08
08
08
2
Memory Type
SDRAM
04
04
04
3
Number of Row Addresses (without BS bits)
13
0D
0D
0D
4
Number of Column Addresses (for x4
SDRAM)
11
0B
0B
0B
5
Number of DIMM Banks
1
01
01
01
6
Module Data Width
72
48
48
48
7
Module Data Width (continued)
0
00
00
00
8
Module Interface Levels
LVTTL
01
01
01
9
SDRAM Cycle Time at CL=3
7.5 ns/10.0 ns
75
75
A0
10
SDRAM Access Time from Clock at CL=3
5.4 ns/6.0 ns
54
54
60
11
Dimm Config (Error Det/Corr.)
ECC
02
02
02
12
Refresh Rate/Type
Self-Refresh, 7.8
μ
s
82
82
82
13
SDRAM width, Primary
x4
04
04
04
14
Error Checking SDRAM Data Width
n/a / x4
04
04
04
15
Minimum Clock Delay from Back to Back
Random Column Address
t
ccd
= 1 CLK
01
01
01
16
Burst Length Supported
1, 2, 4, 8
0F
0F
0F
17
Number of SDRAM Banks
4
04
04
04
18
Supported CAS Latencies
CL = 2/3
06
06
06
19
CS Latencies
CS Latency = 0
01
01
01
20
WE Latencies
WL = 0
01
01
01
21
SDRAM DIMM Module Attributes
Registered/Buffered
1F
1F
1F
22
SDRAM Device Attributes: General
Vcc tol ± 10%
0E
0E
0E
23
Minimum Clock Cycle Time at CAS Latency
= 2
7.5ns/10.0ns
75
A0
A0
24
Maximum Data Access Time from Clock for
CL = 2
5.4ns/6.0ns
54
54
60
25
Minimum Clock Cycle Time at CL = 1
Not Supported
00
00
00
26
Maximum Data Access Time from Clock at
CL = 1
Not Supported
00
00
00
27
Minimum Row Precharge Time
15 ns/20 ns
0F
14
14
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PDF描述 |
|---|---|
| V437464Q24VXTG-75PC | 3.3 VOLT 64M x 72 HIGH PERFORMANCE UNBUFFERED ECC SDRAM MODULE |
| V437464Q24V | 3.3 VOLT 64M x 72 HIGH PERFORMANCE UNBUFFERED ECC SDRAM MODULE |
| V437464Q24VXTG-10PC | 3.3 VOLT 64M x 72 HIGH PERFORMANCE UNBUFFERED ECC SDRAM MODULE |
| V437464Q24VXTG-75 | 3.3 VOLT 64M x 72 HIGH PERFORMANCE UNBUFFERED ECC SDRAM MODULE |
| V437464S24VXTG-75 | 3.3 VOLT 64M x 72 HIGH PERFORMANCE UNBUFFERED ECC SDRAM MODULE |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| V437464E24V | 制造商:MOSEL 制造商全稱:MOSEL 功能描述:3.3 VOLT 64M x 72 HIGH PERFORMANCE REGISTERED SDRAM ECC MODULE |
| V437464E24VXTG-10PC | 制造商:MOSEL 制造商全稱:MOSEL 功能描述:3.3 VOLT 64M x 72 HIGH PERFORMANCE REGISTERED SDRAM ECC MODULE |
| V437464E24VXTG-75 | 制造商:MOSEL 制造商全稱:MOSEL 功能描述:3.3 VOLT 64M x 72 HIGH PERFORMANCE REGISTERED SDRAM ECC MODULE |
| V437464E24VXTG-75PC | 制造商:MOSEL 制造商全稱:MOSEL 功能描述:3.3 VOLT 64M x 72 HIGH PERFORMANCE REGISTERED SDRAM ECC MODULE |
| V437464Q24V | 制造商:MOSEL 制造商全稱:MOSEL 功能描述:3.3 VOLT 64M x 72 HIGH PERFORMANCE UNBUFFERED ECC SDRAM MODULE |
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