參數資料
型號: V3021
廠商: Electronic Theatre Controls, Inc.
英文描述: Ultra Low Power 1-Bit 32 kHz RTC
中文描述: 超低功耗1位32 kHz的時鐘
文件頁數: 2/12頁
文件大?。?/td> 442K
代理商: V3021
Handling Procedures
This device has built-in protection against high static voltages
or electric fields; however, it is advised that normal precautions
Stresses above these listed maximum ratings may
cause permanent damage to the device. Exposure
beyond specified operating conditions may affect
device reliability or cause malfunction.
2
Absolute Maximum Ratings
Table 1
Parameter
Maximum voltage at V
DD
Minimum voltage at V
DD
Maximum voltage at any signal pin
Minimum voltage at any signal pin
Maximum storage temperature
Minimum storage temperature
Electrostatic discharge maximum
to MIL-STD-883C method 3015
Maximum soldering conditions
V
DDmax
V
DDmin
V
max
V
min
T
STOmax
T
STOmin
V
Smax
T
Smax
V
V
V
+ 7.0 V
- 0.3 V
SS
+ 0.3 V
DD
SS
V
- 0.3 V
SS
+150 C
-65 C
O
1000 V
O
250 C x 10 s
Symbol Conditions
Electrical Characteristics
V
= 5.0V ± 10%, V = 0 V and T = - 40 to 85 C, unless otherwise specified
DD
O
Total static supply
Total static supply
Dynamic current
Input / Output
Input logic low
Input logic high
Output logic low
Output logic high
Input leakage
Output tri-state leakage
on I/O pin
Oscillator
Starting voltage
Input capacitance on XI
Output capacitance on XO
Start-up time
Frequency stability
Frequency Measurement Mode
Current source on I/O pin
pulsed on/off @ 256 Hz
I
SS
I
SS
I
SS
V
IL
V
IH
V
OL
V
OH
I
IN
I
TS
V
STA
C
IN
C
OUT
T
STA
D
f/f
I
ONF
all outputs open, all inputs at V
DD
V
= 3.0 V, address 0 = 0
DD
all outputs open, all inputs at V
DD,
V
= 5 V, address 0 = 0
DD
O
T = +25 C
I/O to V through 1 M
W
RD = V , WR = V
CS = 4 MHz
address 0 = 0, read all 0
3.5
0.8
1.8
m
A
m
A
m
A
m
A
V
V
V
V
m
A
m
A
V
pF
pF
s
ppm/V
m
A
10
3
300
1.0
0.4
1
1
0.5
60
1.3
0.1
0.1
13
9
1
0.3
25
2.4
1.8
10
O
T = +25 C
T = +25 C
2.0
V
5.5V , T = +25 C
DD
Table 3
Parameter
Symbol
Test Conditions
Min.
Typ.
Max.
Units
CS high, addr.0, bit 0, high
V = 1 V
I = 4 mA
I
= 4 mA
OH
0.0 < V < 5.0 V
CS high, and address 0,
bit 0, low
,
DD
be taken as for any other CMOS component. Unless otherwise
specified, proper operation can only occur when all terminal
voltages are kept within the supply voltage range. Unused
inputs must always be tied to a defined logic voltage level.
Operating Conditions
T
A
V
DD
-40
2.0
5.0
+85
5.5
O
C
V
V/
m
s
nF
kHz
pF
k
W
6
30
50
100
32.768
8.2
35
7
C
L
R
S
f
Table 2
1)
See Fig. 3
Parameter
Operating temperature
Logic supply voltage
Supply voltage dv/dt
(power-up & power-down)
Decoupling capacitor
Crystal Characteristics
1)
Frequency
Load capacitance
Series resistance
Symbol Min.
Typ. Max. Units
R
V3021
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