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參數(shù)資料
| 型號： | UT7R995-XWA |
| 廠商： | Aeroflex Inc. |
| 英文描述： | RadHard 2.5V/3.3V 200MHz High-Speed Multi-phase PLL Clock Buffer |
| 中文描述： | RadHard 2.5V/3.3V的200MHz的高速多相PLL時鐘緩沖器 |
| 文件頁數(shù)： | 16/22頁 |
| 文件大?。?/td> | 185K |
| 代理商： | UT7R995-XWA |
16
Notes:
1. Reference Figure 11 for clock output loading circuit that is equivalent to the load circuit used for all AC testing.
2. Supplied as a design guideline. Neither guaranteed nor tested.
3. Test load = 40pF, terminated to V
DD
÷
2. All outputs are equally loaded. See figure 11.
4. t
PD
is measured at 1.5V for V
DD
= 3.3V with XTAL1 rise/fall times of 1ns between 0.8V-2.0V.
5. t
LOCK
is the time that is required before outputs synchronize to XTAL1 as determined by the phase alignment between the XTAL1 and FB inputs. This specification
is valid with stable power supplies which are within normal operating limits.
6. Lock detector circuit will monitor the phase alignment between the XTAL1 and FB inputs. When the phase separation between these two inputs is greater than the
amount listed, then the LOCK pin will drop low signaling that the PLL is out of lock.
7. This parameter is guaranteed by measuring cycle-cycle jitter on 55,000, back-to-back clock cycles.
8. Guaranteed by characterization, but not tested.
t
CCJ 7
Cycle-cycle jitter
Divide by 1 output frequency,
FB = divide by 12
--
50
ps
Symbol
Description
Condition
Min.
Max.
Unit
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相關代理商/技術參數(shù) |
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|---|---|
| UT7R995-XWC | 制造商:AEROFLEX 制造商全稱:AEROFLEX 功能描述:RadHard 2.5V/3.3V 200MHz High-Speed Multi-phase PLL Clock Buffer |
| UT7R995-XWX | 制造商:AEROFLEX 制造商全稱:AEROFLEX 功能描述:RadHard 2.5V/3.3V 200MHz High-Speed Multi-phase PLL Clock Buffer |
| UT80196 | 制造商:AEROFLEX 制造商全稱:AEROFLEX 功能描述:20MHz 16-bit Microcontroller |
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