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參數(shù)資料
| 型號(hào)： | UT7Q512-UPA |
| 元件分類： | SRAM |
| 英文描述： | 512K X 8 STANDARD SRAM, 100 ns, CDFP32 |
| 封裝： | CERAMIC, FP-32 |
| 文件頁數(shù)： | 8/12頁 |
| 文件大小： | 142K |
| 代理商： | UT7Q512-UPA |
5
DC ELECTRICAL CHARACTERISTICS (Pre/Post-Radiation)*
(VDD = 5.0V±10%) (-55°C to +125°C)
Notes:
* Post-radiation performance guaranteed at 25
°C per MIL-STD-883 Method 1019.
1. Measured only for initial qualification and after process or design changes that could affect input/output capacitance.
2. Supplied as a design limit but not guaranteed or tested.
3. Not more than one output may be shorted at a time for maximum duration of one second.
SYMBOL
PARAMETER
CONDITION
MIN
MAX
UNIT
VIH
High-level input voltage
2.2
V
VIL
Low-level input voltage
.8
V
VOL
Low-level output voltage
IOL = 2.1mA,VDD =4.5V
0.4
V
VOH
High-level output voltage
IOH = -1mA,VDD =4.5V
2.4
V
CIN
1
Input capacitance
= 1MHz @ 0V
10
pF
CIO
1
Bidirectional I/O capacitance
= 1MHz @ 0V
10
pF
IIN
Input leakage current
VSS < VIN < VDD , VDD = VDD (max)
-2
2
A
IOZ
Three-state output leakage current
0V < VO < VDD
VDD = VDD (max)
G = VDD (max)
-2
2
A
IOS
2, 3
Short-circuit output current
0V <VO <VDD
-80
80
mA
IDD(OP)
Supply current operating
@ 1MHz
Inputs: VIL = VSS + 0.8V,
VIH = 2.2V
IOUT = 0mA
VDD = VDD (max)
50
mA
IDD1(OP)
Supply current operating
@10MHz
Inputs: VIL = VSS + 0.8V,
VIH = 2.2V
IOUT = 0mA
VDD = VDD (max)
100
mA
IDD2(SB)
Nominal standby supply current
@0MHz
Inputs: VIL = VSS + 0.2V,
IOUT = 0mA
E1 = VDD - 0.5
VDD = VDD (max)
VIH = VDD - 0.5V
35
1
A
mA
25
°C
-55
°C to
+125
°C
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