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參數(shù)資料
| 型號(hào)： | UT7C139 |
| 廠商： | Aeroflex Inc. |
| 英文描述： | 4Kx8/9 Radiation-Hardened Dual-Port Static RAM with Busy Flag |
| 中文描述： | 4Kx8 / 9輻射加固雙端口靜態(tài)存儲(chǔ)器的忙標(biāo)志 |
| 文件頁數(shù)： | 11/21頁 |
| 文件大?。?/td> | 373K |
| 代理商： | UT7C139 |
11
Address
CE
R/W
Data in
t
WC
t
SCE
t
AW
t
PWE
t
SA
t
SD
DATA
VALID
t
HA
t
LZWE
t
HD
t
HZWE
HIGH
IMPEDANCE
Figure 4b. Write Cycle 2: R/W Three-States Data I/Os (Either Port)
Assumptions:
1.
The internal write time of memory is defined by the overlap of CE
LOW and R/W LOW. Both signals must be LOW to initialize a write,
and either signal can terminate a write by going HIGH. The data input
set-up and hold timing should be referenced to the rising edge of the sig-
nal that terminates the write.
2. R/W must be HIGH during all address transactions.
3. Data I/O pins enter high impedance even if OE is held LOW during
write.
Data out
t
WHWL
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