參數(shù)資料
型號: UT62256CPC-70LL
廠商: Electronic Theatre Controls, Inc.
英文描述: 32K X 8 BIT LOW POWER CMOS SRAM
中文描述: 32K的× 8位低功耗CMOS SRAM
文件頁數(shù): 5/12頁
文件大?。?/td> 162K
代理商: UT62256CPC-70LL
UTRON
UT62256C
32K X 8 BIT LOW POWER CMOS SRAM
Rev. 1.0
WRITE CYCLE 1
(
WE
Controlled)
(1,2,3,5)
_____________________________________________________________________________________________
UTRON TECHNOLOGY INC. P80027
1F, No. 11, R&D Rd. II, Science-Based Industrial Park, Hsinchu, Taiwan, R. O. C.
TEL: 886-3-5777882 FAX: 886-3-5777919
5
D
OUT
t
WC
t
AW
t
CW
t
WP
t
OW
t
AS
t
WHZ
(4)
High-Z
t
DW
t
DH
(4)
Address
CE
D
IN
Data Valid
WE
t
WR
WRITE CYCLE 2
(
CE
Controlled)
(1,2,5)
High-Z
(4)
Data Valid
D
OUT
t
WC
t
AW
t
CW
t
WP
t
WHZ
t
AS
t
WR
t
DW
t
DH
Address
CE
WE
D
IN
Notes :
1.
WE
or CE must be HIGH during all address transitions.
2. A write occurs during the overlap of a low CE and a low
WE
.
3. During a
WE
controlled with write cycle with OE LOW, t
WP
must be greater than t
WHZ
+t
DW
to allow the drivers
to turn off and data to be placed on the bus.
4. During this period, I/O pins are in the output state, and input signals must not be applied.
5. If the
CE
LOW
transition occurs simultaneously with or after
WE
LOW
transition, the
outputs remain in a high impedance state.
6. t
OW
and t
WHZ
are specified with C
L
= 5pF. Transition is measured
±
500mV from steady state.
相關(guān)PDF資料
PDF描述
UT62256CSC-35 32K X 8 BIT LOW POWER CMOS SRAM
UT62256CSC-35L 32K X 8 BIT LOW POWER CMOS SRAM
UT62256CSC-35LL 32K X 8 BIT LOW POWER CMOS SRAM
UT62256CSC-70 32K X 8 BIT LOW POWER CMOS SRAM
UT62256CSC-70L 32K X 8 BIT LOW POWER CMOS SRAM
相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
UT62256CSC-35 制造商:未知廠家 制造商全稱:未知廠家 功能描述:32K X 8 BIT LOW POWER CMOS SRAM
UT62256CSC-35L 制造商:未知廠家 制造商全稱:未知廠家 功能描述:32K X 8 BIT LOW POWER CMOS SRAM
UT62256CSC-35LL 制造商:未知廠家 制造商全稱:未知廠家 功能描述:32K X 8 BIT LOW POWER CMOS SRAM
UT62256CSC-70 制造商:未知廠家 制造商全稱:未知廠家 功能描述:32K X 8 BIT LOW POWER CMOS SRAM
UT62256CSC-70L 制造商:未知廠家 制造商全稱:未知廠家 功能描述:32K X 8 BIT LOW POWER CMOS SRAM