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參數(shù)資料
| 型號： | UT62256CPC-70L |
| 廠商： | Electronic Theatre Controls, Inc. |
| 英文描述： | 32K X 8 BIT LOW POWER CMOS SRAM |
| 中文描述： | 32K的× 8位低功耗CMOS SRAM |
| 文件頁數(shù)： | 4/12頁 |
| 文件大?。?/td> | 162K |
| 代理商： | UT62256CPC-70L |
UTRON
UT62256C
32K X 8 BIT LOW POWER CMOS SRAM
Rev. 1.0
TIMING WAVEFORMS
READ CYCLE 1
(Address Controlled)
(1,2,4)
_____________________________________________________________________________________________
UTRON TECHNOLOGY INC. P80027
1F, No. 11, R&D Rd. II, Science-Based Industrial Park, Hsinchu, Taiwan, R. O. C.
TEL: 886-3-5777882 FAX: 886-3-5777919
4
t
RC
Address
DOUT
Data Valid
t
AA
t
OH
t
OH
READ CYCLE 2
(
CE
and
OE
Controlled)
(1,3,5,6)
D
OUT
Address
CE
OE
t
RC
t
AA
t
ACE
t
OE
t
CLZ
t
OLZ
High-z
t
OHZ
t
CHZ
Data valid
High-Z
t
OH
Notes :
1.
WE
is HIGH for read cycle.
2. Device is continuously selected CE=V
IL.
3. Address must be valid prior to or coincident with CE transition; otherwise t
AA
is the limiting parameter.
4. OE is LOW.
5. t
CLZ
, t
OLZ
, t
CHZ
and t
OHZ
are specified with C
L
= 5pF. Transition is measured
±
500mV from steady state.
6. At any given temperature and voltage condition, t
CHZ
is less than t
CLZ
, t
OHZ
is less than t
OLZ.
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| UT62256CPC-70LL | 32K X 8 BIT LOW POWER CMOS SRAM |
| UT62256CSC-35 | 32K X 8 BIT LOW POWER CMOS SRAM |
| UT62256CSC-35L | 32K X 8 BIT LOW POWER CMOS SRAM |
| UT62256CSC-35LL | 32K X 8 BIT LOW POWER CMOS SRAM |
| UT62256CSC-70 | 32K X 8 BIT LOW POWER CMOS SRAM |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| UT62256CPC-70LL | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:32K X 8 BIT LOW POWER CMOS SRAM |
| UT62256CSC-35 | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:32K X 8 BIT LOW POWER CMOS SRAM |
| UT62256CSC-35L | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:32K X 8 BIT LOW POWER CMOS SRAM |
| UT62256CSC-35LL | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:32K X 8 BIT LOW POWER CMOS SRAM |
| UT62256CSC-70 | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:32K X 8 BIT LOW POWER CMOS SRAM |
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