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參數(shù)資料
| 型號： | UT54ACTS20-UVAR |
| 元件分類： | 門電路 |
| 英文描述： | ACT SERIES, DUAL 4-INPUT NAND GATE, CDFP14 |
| 封裝： | FP-14 |
| 文件頁數(shù)： | 1/4頁 |
| 文件大?。?/td> | 25K |
| 代理商： | UT54ACTS20-UVAR |
29
RadHard MSI Logic
UT54ACS20/UT54ACTS20
Radiation-Hardened
Dual 4-Input NAND Gates
FEATURES
- Latchup immune
High speed
Low power consumption
Single 5 volt supply
Available QML Q or V processes
Flexible package
- 14-pin DIP
- 14-lead flatpack
radiation-hardened CMOS
DESCRIPTION
The UT54ACS20 and the UT54ACTS20 are dual 4-input
NAND gates. The circuits perform the Boolean functions
Y = A B C D or Y = A + B + C + D in positive logic.
The devices are characterized over full military temperature
range of -55 C to +125 C.
FUNCTION TABLE
LOGIC SYMBOL
PINOUTS
14-Pin DIP
Top View
14-Lead Flatpack
Top View
LOGIC DIAGRAM
INPUTS
OUTPUT
A
B
C
D
Y
H
H
H
H
L
L
X
X
X
H
X
L
X
X
H
X
X
L
X
H
X
X
X
L
H
Y1
(6)
(8)
Y2
(1)
A1
(2)
B1
(4)
(5)
C1
D1
(9)
A2
(10)
(12)
B2
C2
(13)
D2
Note:
1. Logic symbol in accordance with ANSI/IEEE standard 91-1984 and IEC
Publication 617-12.
&
1
2
3
4
5
6
7
14
13
12
11
10
8
9
A1
B1
NC
C1
D1
Y1
V
SS
V
DD
D2
C2
NC
B2
A2
Y2
1
2
3
4
5
6
7
14
13
12
11
10
9
8
V
DD
D2
C2
NC
B2
A2
Y2
A1
B1
NC
C1
D1
Y1
V
SS
Y1
A1
B1
C1
D1
A2
B2
C2
D2
Y2
相關PDF資料 |
PDF描述 |
|---|---|
| UT54ACTS20-UVCR | ACT SERIES, DUAL 4-INPUT NAND GATE, CDFP14 |
| UT54ACTS279-PCCH | ACT SERIES, QUAD LOW LEVEL TRIGGERED R-S LATCH, TRUE OUTPUT, CDIP16 |
| UT54ACTS34-UQXH | ACT SERIES, HEX 1-INPUT NON-INVERT GATE, CDFP14 |
| UT54ACTS34-UVCH | ACT SERIES, HEX 1-INPUT NON-INVERT GATE, CDFP14 |
| UT54ACTS34-UQCR | ACT SERIES, HEX 1-INPUT NON-INVERT GATE, CDFP14 |
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