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參數(shù)資料
| 型號： | UT22VP10T-25WCC |
| 英文描述： | Fuse-Programmable PLD |
| 中文描述： | 保險絲，可編程的PLD |
| 文件頁數(shù)： | 8/19頁 |
| 文件大?。?/td> | 287K |
| 代理商： | UT22VP10T-25WCC |
8
DC ELECTRICAL CHARACTERISTICS
1, 7
(V
DD2
= 5.0V
±
10%; V
SS
= 0V
3,
-55
°
C < T
C
< +125
°
C)
Notes:
1. All specifications valid for radiation dose < 1E6 rads(Si).
2. See page 12 for minimum V
DD
requirements at power-up.
3. Maximum allowable relative shift equals 50mV.
4. Duration not to exceed 1 second, one output at a time.
5. Tested initially and after any design or process changes that affect that parameter and, therefore, shall be guaranteed to the limit specified.
6. All pins not being tested are to be open.
7. CMOS levels only tested on CMOS devices. TTL levels only tested on TTL devices.
SYMBOL
PARAMETER
CONDITION
MINIMUM
MAXIMUM
UNIT
V
IL
Low-level input voltage
TTL
--
.8
V
V
IH
High-level input voltage
TTL
2.2
--
V
V
IL
Low-level input voltage
CMOS
--
.3*V
DD
V
V
IH
High-level input voltage
CMOS
.7*V
DD
--
V
V
OL
Low-level output voltage
I
OL
= 12.0mA, V
DD
= 4.5V (TTL)
.4
V
V
OH
High-level output voltage
I
OH
= -12.0mA, V
DD
= 4.5V (TTL)
2.4
--
V
V
OL
Low-level output voltage
I
OL
= 200
m
A, V
DD
= 4.5V (CMOS)
--
V
SS
+0.05
V
V
OH
High-level output voltage
I
OH
= -200
m
A, V
DD
= 4.5V (CMOS)
V
DD
-0.05
--
V
I
IN
Input leakage current
V
IN
= V
DD
and V
SS
-10
10
μ
A
I
OZ
Three-state output leakage
current
V
O
= V
DD
and V
SS
, V
DD
= 5.5V
-10
10
μ
A
I
OS4,5
Short-circuit output cur-
rent
V
DD
= 5.5V, V
O
= V
DD
V
DD
= 5.5V, V
O
= 0V
-160
160
mA
C
IN5,6
Input capacitance
|
=1MHz @0V
--
15
pF
C
I/O5,6
Bidirectional capacitance
|
=1MHz @0V
--
15
pF
I
DD5
Supply current: Output
three-state, worst-case pat-
tern programmed,
|
=f
MAX1
V
DD
= 5.5V
--
120
mA
I
DDQ
Supply current:
Unprogrammed
V
DD
= 5.5V
--
25
mA
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