
RTI-14
3.0 P
IN
I
DENTIFICATION
A
ND
D
ESCRIPTION
RCS
RRD/RWR
RCV
XMIT
MC/SA
COMSTR
TIMERON
STATUS
CH A/B
MES ERR
UT1553B
RTI
POWER
GROUND
V
DD
V
SS
V
SS
12MHz
MRST
BIPHASE
OUT
BIPHASE
IN
BIPHASE IN A O
BIPHASE IN A Z
TERMINAL
ADDRESS
TA0
TA1
TA2
TA3
TA4
TALEN/PARITY
MODE/CODE
SUBADDRESS
MCSA0
MCSA1
MCSA2
MCSA3
MCSA4
STATUS
SIGNALS
BCEN
CS
ILL COMM
RD/WR
CTRL
ADOEN
CONTROL
SIGNALS
ADDR IN 0
ADDR IN 1
ADDR IN 2
ADDR IN 3
ADDR IN 4
ADDR IN 5
ADDR IN 6
ADDR IN 7
ADDR IN 8
ADDR IN 9
ADDR IN 10
ADDRESS BUS
ADDR IN(10:0)
DATA I/O 12
DATA I/O 13
DATA I/O 14
DATA I/O 15
DATA I/O 0
DATA I/O 1
DATA I/O 2
DATA I/O 3
DATA I/O 4
DATA I/O 5
DATA I/O 6
DATA I/O 7
DATA I/O 8
DATA I/O 9
DATA I/O 10
DATA I/O 11
DATA BUS
DATA(15:0)
BIPHASE IN B O
BIPHASE IN B Z
BIPHASE OUT A O
BIPHASE OUT A Z
BIPHASE OUT B O
BIPHASE OUT B Z
CLOCK
RESET
2MHz
Figure 7. UT1553B RTI Pin Description
DMARQ
MEMCK
DMA
EXT TEST
EXT TST CH SEL A/B
TEST
ADDR OUT 0
ADDR OUT 1
ADDR OUT 2
ADDR OUT 3
ADDR OUT 4
ADDR OUT 5
ADDR OUT 6
ADDR OUT 7
ADDR OUT 8
ADDR OUT 9
ADDR OUT 10
ADDRESS BUS
ADDR OUT
(10:0)
(K3)
(K1)
(H2)
(G3)
(G1)
(F3)
(E1)
(F2)
(D2)
(B1)
(B2)
(L1)
(J2)
(J1)
(H1)
(G2)
(F1)
(E3)
(E2)
(D1)
(C1)
(C2)
(L9)
(K9)
(D11)
(F11)
(B10)
(K2)
(F10)
(K11)
(L7)
(G10)
(K7)
(E9)
(E10)
(C11)
(L3)
(L5)
(L6)
(J7)
(F9)
(E11)
(H11)
(B11)
(K6)
(J6)
(G11)
(D10)
(J5)
(L4)
(K4)
(L2)
(K5)
(B8)
(B9)
(B7)
(A7)
(C6)
(C10)
(A1)
(B3)
(A2)
(A3)
(B4)
(A4)
(C5)
(B5)
(A5)
(A6)
(C7)
(B6)
(A8)
(A9)
(A10)
(A11)
(J10)
(K10)
(G9)
(H10)
(L10)
(L11)
(K8)
(L8)
Note:
Pingrid array numbers are in parentheses. LCC pin numbers are not in parentheses.
27
28
32
30
37
39
33
34
64
62
60
58
56
52
14
16
17
18
19
49
41
22
21
51
38
45
43
23
26
25
44
46
50
15
20
13
9
7
5
3
1
8
8
7
7
7
74
73
72
71
70
69
68
67
66
65
63
61
59
57
55
53
11
10
8
6
4
2
84
82
80
78
76
29
31
48
47
54
12
42
35
24
40
BRDCST
36 (J11)