
FUNCTIONAL DESCRIPTION
PIN DEFINITIONS
Copyright Semtech 2000-2001
DOC7-PXZ-P440-DS-111
www.semtech.com
3
Mnemonic
VDD
VSS
VSS2
OSCIN
Pin #
Type
P
P
P
I
Name and Func tion
Power S upply:
+5V
Ground
Ground
Osc illator Input:
external clock input or one
side of the Ceramic Resonator with built-in Load
Capacitors
Osc illator Output:
open for external clock
input or other side of the Ceramic Resonator with
built-in Load Capacitors
Reset:
apply 0V to provide orderly start-up
Mouse Data:
connects to host
’
s data line
Mouse Cloc k:
connects to host
’
s clock line
External Mouse Cloc k:
PS/2 clock signal from
external mouse
External Mouse Cloc k 1:
connect to XCLK
External Mouse Data:
PS/2 data signal from
external mouse
Left Button:
active low, strobed sampling
Middle Button:
active low, strobed sampling
Right Button:
active low, strobed sampling
S ensor’s Exc itation Driver
S ensor’s Exc itation Driver:
connect to DRV_XY0
S ensor’s Exc itation Driver
S ensor’s Exc itation Driver:
connect to Z_SIG0
S ensor’s Exc itation Driver
S elec t X :
control line for analog multiplexer
S elec t Z:
control line for analog multiplexer
Multiplexer Inhibit S ignal:
active high
Referenc e Voltage
for built-in A/D
Analog to Digital Converter Input
Digital to Analog Converter Output
Offset:
resets the offset circuit during inactivity
S witc hed Power Driver
S witc hed Power Driver:
connect to SPWR0
S witc hed Power Driver:
connect to SPWR0
S witc hed Power Driver:
connect to SPWR0
S witc hed Power Driver:
connect to SPWR0
Reserved:
power management control
8
11
7
9
_OSCOUT
10
O
_RESET
MDAT
MCLK
XCLK
6
I
I/O (nd)
I/O (nd)
I
21
20
17
XCLK1
XDAT
18
16
I/O (nd)
I/O (nd)
_LB
_MB
_RB
DRV_XY0
DRV_XY1
Z_SIG0
Z_SIG1
DRVZ
SELX
SELZ
INH
VREF
AD
DA
OFST
SPWR0
SPWR1
SPWR2
SPWR3
SPWR4
PWROFF
23
24
25
12
13
14
15
I/O (nd)
I/O (nd)
I/O (nd)
I/O
I/O
I/O
I/O
I/O
O
O
O
AI
AI
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
4
2
3
22
5
1
31
32
26
27
28
29
30
19
Note:
An underscore before a pin mnemonic denotes an active low signal.
Pin Types Legend:
AI=Analog Input; I=Input; O=Output; I/O=Input or Output;
I/O (nd)=Input or Output with N-chanel Open Drain driver
The UR7HCPXZ-P440 consists
functionally of five major sections
(see Functional Diagram, previous
page). These are the PixiPoint
TM
Z
Interface, the 16-Bit Timer, the
Oscillator Circuit, the PS/2
Communication Port and the 8042
Emulation Port. All sections
communicate with each other and
operate concurrently.
Semtech
’
s proprietary circuit can correct a significant imbalance between
the gages in each X and Y pair (+/- 25%), allowing relaxed manufacturing
tolerances for the sensors, interconnecting cabling, and temperature-shift
induced errors (no performance degradation over the full operating
temperature range and for large temperature gradients between the
paired gages).
SIGNAL CONDITIONING CIRCUIT
SIGNAL CONDITIONING CIRCUIT (CON
’
T)
The PixiPoint
TM
Z sensor is a flexible
(but very firm)
“
beam
”
with four
Strain Gages
–
one on each of the
sides. If the force is applied
precisely in the X direction, then it
will produce a change of resistance
of only the two X gages. Force in
the Y direction will cause changes
only in the Y gages. One of the
pair of the gages will increase,
while the other will concurrently
decrease the resistance.
If the user presses on the sensor
from the top (Z Axis), all of the
strain gages will decrease the
resistance.
When the test current is passed
through the gages, these resistance
changes are converted into the
voltage changes. These signals are
very small, typically under 1 mV Full
Scale.
The Signal Conditioning Circuit
(patent pending) balances and
amplifies the incoming signals for
digitizing by a built-in A/D
converter.