參數(shù)資料
型號(hào)： uPSD3234BV-24U6T
廠商： 意法半導(dǎo)體
英文描述： Flash Programmable System Devices with 8032 Microcontroller Core
中文描述： 閃存可編程系統(tǒng)設(shè)備與8032微控制器內(nèi)核
文件頁(yè)數(shù)： 72/170頁(yè)
文件大?。?/td> 2717K
代理商： UPSD3234BV-24U6T
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uPSD3234A, uPSD3234BV, uPSD3233B, uPSD3233BV
72/170
Table 51. Description of the SxCON Bits
Table 52. Selection of the Serial Clock Frequency SCL in Master Mode
Bit
Symbol
Function
7
CR2
This bit along with Bits CR1and CR0 determines the serial clock frequency when SIO is
in the Master Mode.
6
ENII
Enable IIC. When ENI1 = 0, the IIC is disabled. SDA and SCL outputs are in the high
impedance state.
5
STA
START flag. When this bit is set, the SIO H/W checks the status of the I
2
C-bus and
generates a START condition if the bus free. If the bus is busy, the SIO will generate a
repeated START condition when this bit is set.
4
STO
STOP flag. With this bit set while in Master Mode a STOP condition is generated.
When a STOP condition is detected on the I
2
C-bus, the I
2
C hardware clears the STO
flag.
Note:
This bit have to be set before 1 cycle interrupt period of STOP That is, if this bit is
set, STOP condition in Master Mode is generated after 1 cycle interrupt period.
3
ADDR
This bit is set when address byte was received. Must be cleared by software.
2
AA
Acknowledge enable signal. If this bit is set, an acknowledge (low level to SDA) is
returned during the acknowledge clock pulse on the SCL line when:
Own slave address is received
A data byte is received while the device is programmed to be a Master Receiver
A data byte is received while the device is a selected Slave Receiver. When this bit is
reset, no acknowledge is returned.
SIO release SDA line as high during the acknowledge clock pulse.
1
CR1
These two bits along with the CR2 Bit determine the serial clock frequency when SIO is
in the Master Mode.
0
CR0
CR2
CR1
CR0
f
OSC
Divisor
Bit Rate (kHz) at f
OSC
12MHz
24MHz
36MHz
40MHz
0
0
0
16
375
750
X
X
0
0
1
24
250
500
750
833
0
1
0
30
200
400
600
666
0
1
1
60
100
200
300
333
1
0
0
120
50
100
150
166
1
0
1
240
25
50
75
83
1
1
0
480
12.5
25
37.5
41
1
1
1
960
6.25
12.5
18.75
20
相關(guān)PDF資料
PDF描述
uPSD3234BV-40U1T Flash Programmable System Devices with 8032 Microcontroller Core
uPSD3234BV-40U6T Flash Programmable System Devices with 8032 Microcontroller Core
uPSD3234 Flash Programmable System Device with 8032 Microcontroller Core(嵌入高速“8032微控制器核”的Flash型可編程系統(tǒng)器)
uPSD3251(中文) Flash Programmable System Devices with 8032 Microcontroller Core(帶8032微控制器內(nèi)核的Flash可編程系統(tǒng)設(shè)備)
uPSD3251 Flash Programmable System Devices with 8032 Microcontroller Core(帶8032微控制器內(nèi)核的Flash可編程系統(tǒng)設(shè)備)
相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
UPSD3234BV-40T1 制造商:STMICROELECTRONICS 制造商全稱:STMicroelectronics 功能描述:Flash Programmable System Device with 8032 Microcontroller Core
UPSD3234BV-40T1T 制造商:STMICROELECTRONICS 制造商全稱:STMicroelectronics 功能描述:Flash Programmable System Device with 8032 Microcontroller Core
UPSD3234BV-40T6 制造商:STMICROELECTRONICS 制造商全稱:STMicroelectronics 功能描述:Flash Programmable System Device with 8032 Microcontroller Core
UPSD3234BV-40T6T 制造商:STMICROELECTRONICS 制造商全稱:STMicroelectronics 功能描述:Flash Programmable System Devices with 8032 Microcontroller Core and 64Kbit SRAM
UPSD3234BV-40U1 制造商:STMICROELECTRONICS 制造商全稱:STMicroelectronics 功能描述:Flash Programmable System Device with 8032 Microcontroller Core
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