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參數(shù)資料
| 型號： | uPSD3234B-24T1T |
| 廠商： | 意法半導(dǎo)體 |
| 英文描述： | Flash Programmable System Devices with 8032 Microcontroller Core |
| 中文描述： | 閃存可編程系統(tǒng)設(shè)備與8032微控制器內(nèi)核 |
| 文件頁數(shù)： | 57/170頁 |
| 文件大?。?/td> | 2717K |
| 代理商： | UPSD3234B-24T1T |
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uPSD3234A, uPSD3234BV, uPSD3233B, uPSD3233BV
Table 44. Description of the SCON Bits
Baud Rates.
The baud rate in Mode 0 is fixed:
Mode 0 Baud Rate = f
OSC
/ 12
The baud rate in Mode 2 depends on the value of
Bit SMOD = 0 (which is the value on reset), the
baud rate is 1/64 the oscillator frequency. If SMOD
= 1, the baud rate is 1/32 the oscillator frequency.
Mode 2 Baud Rate = (2
SMOD
/ 64) x f
OSC
In the uPSD323X Devices, the baud rates in
Modes 1 and 3 are determined by the Timer 1
overflow rate.
Using Timer 1 to Generate Baud Rates.
When
Timer 1 is used as the baud rate generator, the
baud rates in Modes 1 and 3 are determined by
the Timer 1 overflow rate and the value of SMOD
as follows (see:
Mode 1,3 Baud Rate =
(2
SMOD
/ 32) x (Timer 1 overflow rate)
The Timer 1 Interrupt should be disabled in this
application. The Timer itself can be configured for
either “timer” or “counter” operation, and in any of
its 3 running modes. In the most typical applica-
tions, it is configured for “timer” operation, in the
Auto-reload Mode (high nibble of TMOD = 0010B).
In that case the baud rate is given by the formula:
Mode 1,3 Baud Rate =
(2
SMOD
/ 32) x (f
OSC
/ (12 x [256 – (TH1)]))
One can achieve very low baud rates with Timer 1
by leaving the Timer 1 Interrupt enabled, and con-
figuring the Timer to run as a 16-bit timer (high nib-
ble of TMOD = 0001B), and using the Timer 1
Interrupt to do a 16-bit software reload.
Figure
22., page 51
lists various commonly used baud
rates and how they can be obtained from Timer 1.
Using Timer/Counter 2 to Generate Baud
Rates.
In the uPSD323X Devices, Timer 2 select-
ed as the baud rate generator by setting TCLK
and/or RCLK (see
Figure 22., page 51
Timer/
Counter 2 Control Register (T2CON)).
Note:
The baud rate for transmit and receive can
be simultaneously different. Setting RCLK and/or
TCLK puts Timer into its Baud Rate Generator
Mode.
The RCLK and TCLK Bits in the T2CON register
configure UART 1. The RCLK1 and TCLK1 Bits in
the PCON register configure UART 2.
The Baud Rate Generator Mode is similar to the
Auto-reload Mode, in that a roll over in TH2 causes
the Timer 2 registers to be reloaded with the 16-bit
value in registers RCAP2H and RCAP2L, which
are preset by software.
Now, the baud rates in Modes 1 and 3 are deter-
mined at Timer 2’s overflow rate as follows:
Mode 1,3 Baud Rate = Timer 2 Overflow Rate / 16
Bit
Symbol
Function
7
SM0
(SM1,SM0)=(0,0): Shift Register. Baud rate = f
OSC
/12
(SM1,SM0)=(1,0): 8-bit UART. Baud rate = variable
(SM1,SM0)=(0,1): 8-bit UART. Baud rate = f
OSC
/64 or f
OSC
/32
(SM1,SM0)=(1,1): 8-bit UART. Baud rate = variable
6
SM1
5
SM2
Enables the multiprocessor communication features in Mode 2 and 3. In Mode 2 or 3, if
SM2 is set to '1,' RI will not be activated if its received 8th data bit (RB8) is '0.' In Mode 1,
if SM2=1, RI will not be activated if a valid Stop Bit was not received. In Mode 0, SM2
should be '0'
4
REN
Enables serial reception. Set by software to enable reception. Clear by software to
disable reception
3
TB8
The 8th data bit that will be transmitted in Modes 2 and 3. Set or clear by software as
desired
2
RB8
In Modes 2 and 3, this bit contains the 8th data bit that was received. In Mode 1, if
SM2=0, RB8 is the Snap Bit that was received. In Mode 0, RB8 is not used
1
TI
Transmit Interrupt Flag. Set by hardware at the end of the 8th bit time in Mode 0, or at
the beginning of the Stop Bit in the other modes, in any serial transmission. Must be
cleared by software
0
RI
Receive Interrupt Flag. Set by hardware at the end of the 8th bit time in Mode 0, or
halfway through the Stop Bit in the other modes, in any serial reception (except for
SM2). Must be cleared by software
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