參數(shù)資料
型號: uPSD3234
廠商: 意法半導體
英文描述: Flash Programmable System Device with 8032 Microcontroller Core(嵌入高速“8032微控制器核”的Flash型可編程系統(tǒng)器)
中文描述: 閃存可編程系統(tǒng)器件與8032微控制器內(nèi)核(嵌入高速“8032微控制器核”的閃存型可編程系統(tǒng)器)
文件頁數(shù): 30/54頁
文件大小: 736K
代理商: UPSD3234
AN1886 - APPLICATION NOTE
30/54
Evidently, by using relative registers, we can save eight PUSH and eight POP instructions, each taking
two machine cycles to execute – a total saving of 32 machine instructions. Assuming a 36MHz oscillator
frequency, this represents about 10.7μs, which is a long time for the μPSD32xxA. The main drawback is
that we must keep in mind, when programming USB applications, that all the parts of the entire program
must use different register banks, to avoid rewriting the register contents.
Since the 8051 supports four register banks, and has two levels of interrupts, any part of μPSD32xxA code
can be interrupted to level-1, and this interrupt service routine can subsequently be interrupted to level-2.
So we suggest using the structure, shown in
Table 24.
, for register bank allocation.
Table 24. Suggested Assignment of Register Banks
USB may Generate Spurious Interrupts when the Device is Plugged in
The main worry is that the CPU load is very high during the time till the
USB RESET
and configuration
state. The problem can be exacerbated when the USB is not the only source of interrupts to the μPSD,
and during this period some of these other interrupts are missed.
Ideally, when USB driver is in the Reset state, or other non-operational state, and both of the USB lines
(D– and D+) has low level (or near the same) for longer time, the internal logic must logically disable any
other processing of data originating from the analog differential stage of the USB. This is because both
input signals have a near zero differential voltage, and the differential stage is prone to amplifying noise,
thereby generating random data bits, and misinterpreting them as communication.
The main concern is that CPU load increases dramatically for a short time (about 40ms) when the USB
cable is plugged.
μPSD USB IP sometimes Triggers an Interrupt but no Bit of UISTA is Set
The μPSD32xxA can enter the USB interrupt service routine, but with none of the UISTA bits being set to
identify the source of the interrupt. This situation can occur when the USB device or cable is unplugged.
μPSD USB IP Generates Interrupts with an Undocumented Flag
The μPSD32xxA can enter the USB interrupt service routine, with the reserved flag, bit-6, of UISTA set.
This situation, too, can occur when the USB device or cable is unplugged, nearly always after 5 to 20μs
have elapsed, when both signals (D+ and D–) go down to logic zero (BUS reset).
This state is not stable, and persists only for a short time. If this bit is set, the
UISTA
register contains 0xFE
in most cases, so it can be misinterpreted as a request to service nearly all the interrupt sources.
USB State Machine does not Clear the STALL0 Bit when a SETUP Packet is Received
The internal USB state machine does not clear
STALL0
flag, previously set to STALL Endpoint0. This
causes problems with USB 2.0 and Win98.
The USB demo 2.0_XP, and later versions, fix this problem by a software clear of the
STALL0
bit when it
is set and a SETUP packet has been received.
Register Bank 3
Interrupt level-2
Main USB Interrupt Service Routine
only
Register Bank 2
Interrupt level-1
Remaining USB tasks, other interrupts like Timer0, 1, 2, serial line and so forth.
Register Bank 1
Reserved for alterative registers in main program
Register Bank 0
Main program, all routines (starting from main()), default state
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