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參數(shù)資料
| 型號： | UPSD3213BV-40U6T |
| 廠商： | 意法半導體 |
| 英文描述： | Flash Programmable System Devices with 8032 Microcontroller Core and 64Kbit SRAM |
| 中文描述： | 閃存可編程系統(tǒng)設(shè)備與8032微控制器核心和64Kbit SRAM的 |
| 文件頁數(shù)： | 18/176頁 |
| 文件大小： | 1081K |
| 代理商： | UPSD3213BV-40U6T |
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μ
PSD323X
18/176
Accumulator.
The Accumulator is the 8-bit gen-
eral purpose register, used for data operation such
as transfer, temporary saving, and conditional
tests. The Accumulator can be used as a 16-bit
register with B Register as shown below.
Figure 7. Configuration of BA 16-bit Registers
B Register.
The B Register is the 8-bit general
purpose register, used for an arithmetic operation
such as multiply, division with Accumulator
Stack Pointer.
The Stack Pointer Register is 8
bits wide. It is incremented before data is stored
during PUSH and CALL executions. While the
stack may reside anywhere in on-chip RAM, the
Stack Pointer is initialized to 07h after reset. This
causes the stack to begin at location 08h.
Figure 8. Stack Pointer
Program Counter.
The ProgramCounter is a 16-
bit wide which consists of two 8-bit registers, PCH
and PCL. This counter indicatestheaddress of the
next instruction to be executed. In RESET state,
the program counter has reset routine address
(PCH:00h, PCL:00h).
Program Status Word.
The
Word (PSW) contains several bits that reflect the
current state of the CPU and select Internal RAM
(00h to 1Fh: Bank0 to Bank3). The PSW is de-
scribed in Figure 9, page 19. It contains the Carry
flag, the Auxiliary carry flag, the Half Carry (for
BCD operation), the general purpose flag, the
Register bank select flags, the Overflow flag, and
Parity flag.
[Carry Flag, CY]. This flag stores any carry or not
borrow from the ALU of CPU after an arithmetic
operation and is also changedby the Shift Instruc-
tion or Rotate Instruction.
[Auxiliary Carry Flag, AC]. After operation, this is
set when there is a carry from Bit 3 of ALU or there
is no borrow from Bit 4 of ALU.
[Register Bank Select Flags,RS0, RS1]. Thisflags
select
one
of
four
08~0Fh:bank1, 10~17h:bank2, 17~1Fh:bank3) in
Internal RAM.
[Overflow Flag, OV]. This flag is set to ’1’when an
overflow occurs as the result of an arithmetic oper-
ation involving signs. An overflow occurs when the
result of an addition or subtraction exceeds +127
(7Fh) or -128 (80h). The CLRV instruction clears
the overflow flag. Thereis noset instruction. When
the BIT instruction is executed, Bit 6 of memory is
copied to this flag.
[Parity Flag, P]. This flag reflect on number of Ac-
cumulator’s 1. If number of Accumulator’s 1 is odd,
P=0. otherwise P=1. Sum of adding Accumulator’s
1 to P is always even.
R0~R7.
General purpose 8-bit registers that are
locked in the lower portion of internal data area.
Data Pointer Register.
Data Pointer Register is
16-bit wide which consists of two-8bit registers,
DPH and DPL. This register is used as a data
pointer for the datatransmission with external data
memory in thePSD Module.
Program
Status
bank(00~07H:bank0,
AI06637
Two 8-bit Registers can be used as a ”BA” 16-bit Registers
A
B
A
B
AI06638
SP (Stack Pointer) could be in 00h-FFh
SP
00h
Stack Area (30h-FFh)
00h-FFh
Hardware Fixed
Bit 15
Bit 0
Bit 8 Bit 7
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