
CHAPTER 3 CPU ARCHITECTURE
User’s Manual U17473EJ2V0UD
67
Table 3-7. Special Function Register List (4/4)
Manipulatable Bit Unit
Address
Special Function Register (SFR) Name
Symbol
R/W
1 Bit
8 Bits
16 Bits
After
Reset
FFBEH
Low-voltage detection register
LVIM
R/W
√
00H
Note 1
FFBFH
Low-voltage detection level selection register
LVIS
R/W
√
00H
Note 1
FFE0H
Interrupt request flag register 0L
IF0
IF0L
R/W
√
00H
FFE1H
Interrupt request flag register 0H
IF0H
R/W
√
00H
FFE2H
Interrupt request flag register 1L
IF1
IF1L
R/W
√
00H
FFE3H
Interrupt request flag register 1H
IF1H
R/W
√
00H
FFE4H
Interrupt mask flag register 0L
MK0
MK0L R/W
√
FFH
FFE5H
Interrupt mask flag register 0H
MK0H R/W
√
FFH
FFE6H
Interrupt mask flag register 1L
MK1
MK1L R/W
√
FFH
FFE7H
Interrupt mask flag register 1H
MK1H R/W
√
FFH
FFE8H
Priority specification flag register 0L
PR0
PR0L
R/W
√
FFH
FFE9H
Priority specification flag register 0H
PR0H R/W
√
FFH
FFEAH
Priority specification flag register 1L
PR1
PR1L
R/W
√
FFH
FFEBH
Priority specification flag register 1H
PR1H R/W
√
FFH
FFF0H
Internal memory size switching register
Note 2
IMS
R/W
√
CFH
FFF3H
Bank select register
BANK
R/W
√
00H
FFF4H
Internal expansion RAM size switching
register
Note 2
IXS
R/W
√
0CH
FFFBH
Processor clock control register
PCC
R/W
√
01H
LCDCTL's
00H
LCD mode setting register
LCDMD
R/W
√
00H
LCDCTL's
01H
LCD display mode register
LCDM
R/W
√
00H
LCDCTL's
02H
LCD clock control register
LCDC
R/W
√
00H
LCDCTL's
03H
LCD voltage boost control register 0
VLCG0
R/W
√
00H
Notes 1.
The reset values of LVIM and LVIS vary depending on the reset source.
2.
Regardless of the internal memory capacity, the initial values of the internal memory size switching
register (IMS) and internal expansion RAM size switching register (IXS) of all products in the 78K0/LG2
are fixed (IMS = CFH, IXS = 0CH). Therefore, set the value corresponding to each product as indicated
below.
Flash Memory Version
(78K0/LG2)
IMS
IXS
ROM
Capacity
Internal High-Speed
RAM Capacity
Internal Expansion
RAM Capacity
μPD78F0393
C8H
0CH
32 KB
μPD78F0394
CCH
0AH
48 KB
1 KB
μPD78F0395
CFH
0BH
60 KB
2 KB
μPD78F0396
CCH
04H
96 KB
4 KB
μPD78F0397, 78F0397DNote3 CCH
00H
128 KB
1 KB
6 KB
3.
The ROM and RAM capacities of the products with the on-chip debug function can be debugged
according to the debug target products. Set IMS and IXS according to the debug target products.
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