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參數(shù)資料
| 型號： | UPD784225Y |
| 廠商： | NEC Corp. |
| 英文描述： | 16/8-BIT SINGLE-CHIP MICROCONTROLLERS |
| 中文描述： | 16/8-BIT單晶片微控制器 |
| 文件頁數(shù)： | 47/92頁 |
| 文件大小： | 687K |
| 代理商： | UPD784225Y |
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47
μ
PD784224, 784225, 784224Y, 784225Y
Data Sheet U12376EJ1V0DS00
Table 8-2. Interrupt Sources
Type
Default
Priority
Source
Internal/
External
Macro
Service
Name
Trigger
Software
—
BRK instruction
BRKCS instruction
Instruction execution
Instruction execution
—
—
Operand error
If result of exclusive OR between operands
byte and byte is not FFH when MOV STBC,
#byte instruction or MOV WDM, #byte
instruction, LOCATION instruction is executed
Pin input edge detection
Overflow of watchdog timer
Overflow of watchdog timer
Non-maskable
—
NMI
INTWDT
INTWDTM
External
Internal
Internal
—
Maskable
0 (
highest
)
1
2
3
4
INTP0
INTP1
INTP2
INTP3
Pin input edge detection
External
5
6
7
INTP4
INTP5
INTIIC0
Note
INTCSI0
End of I
2
C bus transfer by CSI0
End of 3-wire transfer by CSI0
Internal
8
9
INTSER1
INTSR1
INTCSI1
INTST1
Occurrence of UART reception error in ASI1
End of UART reception by ASI1
End of 3-wire transfer by CSI1
End of UART transfer by ASI1
10
11
12
INTSER2
INTSR2
INTCSI2
INTST2
Occurrence of UART reception error in ASI2
End of UART reception by ASI2
End of 3-wire transfer by CSI2
End of UART transfer by ASI2
13
14
15
INTTM3
INTTM00
Reference time interval signal from watch timer
Signal indicating coincidence between 16-bit
timer counter and capture/compare register
(CR00)
Signal indicating coincidence between 16-bit
timer counter and capture/compare register
(CR01)
Occurrence of coincidence signal of 8-bit
timer/counter 1
Occurrence of coincidence signal of 8-bit
timer/counter 2
End of conversion by A/D converter
Occurrence of coincidence signal of 8-bit
timer/counter 5
Occurrence of coincidence signal of 8-bit
timer/counter 6
Overflow of watch timer
16
INTTM01
17
INTTM1
18
INTTM2
19
20
INTAD
INTTM5
21
INTTM6
22
(lowest)
INTWT
Note
μ
PD784255Y Subseries only
Remarks 1.
ASI : Asynchronous Serial Interface
CSI: Clocked Serial Interface
2.
There are two interrupt sources for the watchdog timer: non-maskable interrupts (INTWDT) and
maskable interrupts (INTWDTM). Either one (but not both) should be selected for actual use.
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