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參數(shù)資料
| 型號： | UPD78324 |
| 廠商： | NEC Corp. |
| 英文描述： | 16/8-BIT SINGLE-CHIP MICROCONTROLLER |
| 中文描述： | 16/8-BIT單片機 |
| 文件頁數(shù)： | 30/86頁 |
| 文件大?。?/td> | 454K |
| 代理商： | UPD78324 |
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30
μ
PD78323, 78324
3.
BLOCK FUNCTIONS
3.1
BUS CONTROL UNIT (BCU)
In the BCU, the necessary bus cycle is started according to the physical address obtained by the execution unit (EXU).
If no bus cycle startup request is made from the EXU, a prefetch address is generated and instruction prefetch is carried
out. The prefetched instruction code is fetched into the instruction queue.
3.2
EXECUTION UNIT (EXU)
In the EXU, address calculation, arithmetic logical operation and data transfer are controlled by microprograms. A 256-
byte RAM is built in the EXU.
The 256-byte RAM in the EXU is accessible by the relevant instruction faster than peripheral RAM (768 bytes).
3.3
ROM/RAM
This block consists of a 32K-byte ROM and a 768-byte RAM. However, the
μ
PD78323 does not incorporate ROM.
ROM access can be disabled by EA pin.
3.4
INTERRUPT CONTROLLER
Various interrupt requests (NMI, INTP0 to INTP6) generated either externally or from the peripheral hardware are
processed by the context switch, vectored interrupt or macro service function.
The 3-level interrupt priority is also specified.
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