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參數(shù)資料
| 型號(hào)： | UPD78018FY |
| 廠商： | NEC Corp. |
| 元件分類： | 8位微控制器 |
| 英文描述： | 8-bit Microcontroller with 2/4/8K Bytes In-System Programmable Flash |
| 中文描述： | 8位微控制器與2/4/8K字節(jié)在系統(tǒng)可編程閃存 |
| 文件頁數(shù)： | 32/62頁 |
| 文件大?。?/td> | 576K |
| 代理商： | UPD78018FY |
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32
μ
PD78001B(A), 78002B(A)
Subsystem Clock Oscillation Circuit Characteristics
(T
A
= –40 to +85
°
C, V
DD
= 2.7 to 6.0 V)
Unit
kHz
s
kHz
μ
s
MAX.
35
2
10
100
15
Test Conditions
V
DD
= 4.5 to 6.0 V
Parameter
Oscillator
frequency (f
XT
)
*1
Oscillation
stabilization time
*2
XT1 input
frequency (f
XT
)
*1
XT1 input
high/low level width
(t
XTH
, t
XTL
)
Resonator
Crystal
resonator
External
clock
Recommended
Circuit
XT1
XT2
XT1
XT2
C4
C3
R2
V
SS
MIN.
32
32
5
TYP.
32.768
1.2
*
1.
2.
Indicates only oscillation circuit characteristics. Refer to “AC Characteristics” for instruction execution time.
Time required to stabilize oscillation after V
DD
reaches oscillator voltage MIN.
C
autions
1.
When using the subsystem clock oscillator, wiring in the area enclosed with the broken line should be carried
out as follows to avoid an adverse effect from wiring capacitance.
Wiring should be as short as possible.
Wiring should not cross other signal lines.
Wiring should not be placed close to a varying high current.
The potential of the oscillator capacitor ground should be the same as VSS.
Do not ground wiring to a ground pattern in which a high current flows.
Do not fetch a signal from the oscillator.
2.
The subsystem clock oscillation circuit is a circuit with a low amplification level, more prone to misoperation
due to noise than the main system clock. When using the subsystem clock, special care is needed regarding
the wiring method.
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