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參數資料
| 型號： | UPD77113A |
| 廠商： | NEC Corp. |
| 英文描述： | MOS INTEGRATED CIRCUIT |
| 中文描述： | 馬鞍山集成電路 |
| 文件頁數： | 35/62頁 |
| 文件大?。?/td> | 352K |
| 代理商： | UPD77113A |
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Data Sheet U14373EJ3V0DS
35
μ
PD77113A, 77114
Instructions Simultaneously Written
Flag
Instruc-
tion
Instruction
Name
Mnemonic
Operation
Trino-
mial
Bino-
mial
Unino-
minal
Load/
store
Trans-
fer
Imme-
diate-
value
Bran-
ch
Loop
Cont-
rol
OV
ro = *dpx_mod ro
′
=
*dpy_mod
ro
←
*dpx, ro
′
←
*dpy
ro = *dpx_mod
*dpy_mod = rh
ro
←
*dpx, *dpy
←
rh
*dpx_mod = rh ro =
*dpy_mod
*dpx
←
rh, ro
←
*dpy
Parallel
load/store
Notes 1, 2
*dpx_mod = rh
*dpy_mod = rh
′
*dpx
←
rh, *dpy
←
rh
′
√
√
√
z
dest = *dpx_mod
dest
′
= *dpy_mod
dest
←
*dpx,
dest
′
←
*dpy
dest = *dpx_mod
*dpy_mod = source
dest
←
*dpx,
*dpy
←
source
*dpx_mod = source
dest = *dpy_mod
*dpx
←
source,
dest
←
*dpy
Partial load/
store
Notes 1, 2, 3
*dpx_mod = source
*dpy_mod = source
′
*dpx
←
source,
*dpy
←
source
′
z
dest = *addr
dest
←
*addr
Direct
addressing
load/store
Note 4
*addr = source
*addr
←
source
z
dest = *dp_imm
dest
←
*dp
Load/
store
Immediate
value index
load/store
Note 5
*dp_imm = source
*dp
←
source
z
dest = rl
dest
←
rl
Register-
to-register
transfer
Register-to-
register
transfer
Note 6
rl = source
rl
←
source
√
z
rl = imm
(where imm = 0 to 0xFFFF)
rl
←
imm
dp = imm
(where imm = 0 to 0xFFFF)
dp
←
imm
dn = imm
(where imm = 0 to 0xFFFF)
dn
←
imm
Immediate
value
setting
Immediate
value setting
dm = imm
(where imm = 1 to 0xFFFF)
dm
←
imm
z
Notes 1.
Of the two mnemonics, either one of them or both can be written.
2.
After transfer, modification specified by mod is performed.
3.
Select any of dest, dest’ = {ro, reh, re, rh, rl}, source, source’ = {re, rh, rl}.
4.
Select any of dest = {ro, reh, re, rh, rl}, source = {re, rh, rl},
0: X-0xFFF
0: Y-0xFFFF
: X (X memory)
: Y (Y memory)
addr =
.
5.
Select any of dest = {ro, reh, re, rh, rl}, source = {re, rh, rl}.
6.
Select any register other than general-purpose registers as dest and source.
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