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參數(shù)資料
| 型號(hào)： | UPD77017GC |
| 廠商： | NEC Corp. |
| 元件分類： | 數(shù)字信號(hào)處理 |
| 英文描述： | 16 bits, Fixed-point Digital Signal Processor |
| 中文描述： | 16位定點(diǎn)數(shù)字信號(hào)處理器 |
| 文件頁數(shù)： | 19/60頁 |
| 文件大?。?/td> | 424K |
| 代理商： | UPD77017GC |
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19
μ
PD77015, 77017, 77018
2.3.6 CJC: Condition Judge Circuit
CJC judges whether condition is true or false with 40 bits input data. A conditional instruction is executed
when the result is true, and not executed when the result is false.
2.4 Memory
The
μ
PD77017 has one instruction memory area (64K words
×
32 bits) and two data memory areas (64K words
×
16 bits each). It adopts Harvard-type architecture, with instruction memory area and data memory areas
separated.
The
μ
PD77017 has 2 sets of data addressing units, which are dedicated for addressing data memory area.
Each addressing unit consists of four data pointers, four index registers, a modulo register and addressing ALU.
X memory area addresses are specified by DP0 to DP3, and Y memory area addresses are specified by DP4
to DP7. After memory access, DPn (with the same subscript), can be modified by DNn value. Modulo operation
is performed with DMX for DP0 to DP3, with DMY for DP4 to DP7.
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