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參數(shù)資料
| 型號(hào)： | UPD75P0116GB-3BS-MTX |
| 廠商： | NEC Corp. |
| 英文描述： | RECTIFIER BRIDGE 1.5A 200V 50A-ifsm 1V-vf 5uA-ir WOG 1K/BULK |
| 中文描述： | 4位單片機(jī) |
| 文件頁數(shù)： | 20/40頁 |
| 文件大?。?/td> | 320K |
| 代理商： | UPD75P0116GB-3BS-MTX |
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20
μ
PD75P048
SUBSYSTEM CLOCK OSCILLATOR CIRCUIT CHARACTERISTICS
(T
a
= -10 to +70
°
C, V
DD
= 2.7 to 6.0 V)
Oscillator
Recommended
Constants
Item
Conditions
MIN.
TYP.
MAX.
Unit
Crystal
Oscillation
frequency (f
XT
)
Note 1
32
32.768
35
kHz
Oscillation stabiliza-
tion time
Note 2
V
DD
= 4.5 to 6.0 V
1.0
2
s
10
s
External Clock
XT1 input frequency
(f
XT
)
Note 1
32
100
kHz
XT1 input high-,
low-level widths
(t
XTH
, t
XTL
)
5
15
μ
s
Note 1.
Indicates only the characteristics of the oscillator circuit. For instruction execution time, refer to AC
Characteristics.
2.
Time required for oscillation to stabilize after V
DD
has reached the minimum value of the oscillation
voltage range.
Caution When using the oscillation circuit of the subsystem clock, wire the portion enclosed in dotted line
in the figures as follows to avoid adverse influences on the wiring capacity:
Keep the wiring length as short as possible.
Do not cross the wiring over the other signal lines.
Do not route the wiring in the vicinity of lines through which a high alternating current flows.
Always keep the ground point of the capacitor of the oscillator circuit at the same potential as
V
DD
. Do not connect the ground pattern through which a high current flows.
Do not extract signals from the oscillation circuit.
The amplification factor of the subsystem clock oscillation circuit is designed to be low to reduce
the current dissipation and therefore, the subsystem clock oscillation circuit is influenced by noise
more easily than the main system clock oscillation circuit. When using the subsystem clock,
therefore, exercise utmost care in wiring the circuit.
XT1
XT2
XT1
XT2
R
C3
C4
V
DD
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