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參數(shù)資料
| 型號(hào)： | UPD754304 |
| 廠商： | NEC Corp. |
| 元件分類： | 4位微控制器 |
| 英文描述： | 4-BIT SINGLE-CHIP MICROCONTROLLER FOR SMALL GENERAL-PURPOSE INFRARED REMOTE CONTROL TRANSMITTER |
| 中文描述： | 4位單片機(jī)的小型通用紅外遙控器 |
| 文件頁(yè)數(shù)： | 50/74頁(yè) |
| 文件大?。?/td> | 316K |
| 代理商： | UPD754304 |
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50
μ
PD754302, 754304, 754302(A), 754304(A)
System Clock Oscillator Characteristics (T
A
= –40 to +85
°
C, V
DD
= 1.8 to 5.5 V)
Resonator
Recommended Constant
Parameter
Testing Conditions
MIN.
TYP.
MAX.
Unit
Ceramic
resonator
Oscillation
frequency (f
X
)
Note1
1.0
6.0
Note2
MHz
Oscillation
stabilization
time
Note 3
After V
DD
reaches MIN.
value of oscillation
voltage range
4
ms
Crystal
resonator
Oscillation
frequency(f
X
)
Note1
1.0
6.0
Note2
MHz
Oscillation
stabilization time
Note3
V
DD
= 4.5 to 5.5 V
10
ms
30
ms
External
clock
X1 input
frequency (f
X
)
Note1
1.0
6.0
Note2
MHz
X1 input high- and
low-level widths
(t
XH
, t
XL
)
83.3
500
ns
Notes 1.
Only the oscillator characteristics are shown. For the instruction execution time, refer to
AC Charac-
teristics
.
If the oscillation frequency is 4.19 MHz < f
X
≤
6.0 MHz at 1.8 V
≤
V
DD
< 2.7 V, set the processor control
register (PCC) to a value other than 0011. If the PCC is set to 0011, the rated cycle time of 0.95
μ
s
is not satisfied.
Oscillation stabilization time is a time required for oscillation to stabilize after application of V
DD
,
or after the STOP mode has been released.
2.
3.
Caution When using the oscillation circuit of the main system clock, wire the portion enclosed in dotted
lines in the figures as follows to avoid adverse influences on the wiring capacitance:
Keep the wire length as short as possible.
Do not cross other signal lines.
Do not route the wiring in the vicinity of lines though which a high fluctuating current flows.
Always keep the ground point of the capacitor of the oscillation circuit as the same potential
as V
SS
.
Do not connect the power source pattern through which a high current flows.
Do not extract signals from the oscillation circuit.
X1
X2
X1
X2
C1
C2
X1
X2
C1
C2
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