59
μ
PD753204, 753206, 753208
DC CHARACTERISTICS (T
A
= –40 to +85C, V
DD
= 1.8 to 5.5 V)
Parameter
Symbol
Test conditions
MIN.
TYP.
MAX.
Unit
Output voltage low
I
OL
Per pin
15
mA
Sum of the all pins
150
mA
Input voltage high
V
IH1
Ports 2, 3, 8, and 9
2.7
≤
V
DD
≤
5.5 V
0.7V
DD
V
DD
V
1.8
≤
V
DD
< 2.7 V
0.9V
DD
V
DD
V
V
IH2
Ports 0, 1, 6, RESET
2.7
≤
V
DD
≤
5.5 V
0.8V
DD
V
DD
V
1.8
≤
V
DD
< 2.7 V
0.9V
DD
V
DD
V
V
IH3
Port 5
When a pull-up register
is incorporated
2.7
≤
V
DD
≤
5.5 V
0.7V
DD
V
DD
V
1.8
≤
V
DD
< 2.7 V
0.9V
DD
V
DD
V
When N-ch open-drain
2.7
≤
V
DD
≤
5.5 V
0.7V
DD
13
V
1.8
≤
V
DD
< 2.7 V
0.9V
DD
13
V
V
IH4
X1
V
DD
– 0.1
V
DD
V
Input voltage low
VI
L1
Ports 2, 3, 5, 8, and 9
2.7
≤
V
DD
≤
5.5 V
0
0.3V
DD
V
1.8
≤
V
DD
< 2.7 V
0
0.1V
DD
V
V
IL2
Ports 0, 1, 6, RESET
2.7
≤
V
DD
≤
5.5 V
0
0.2V
DD
V
1.8
≤
V
DD
< 2.7 V
0
0.1V
DD
V
V
IL3
X1
0
0.1
V
Output voltage high
V
OH
SCK, SO, ports 2, 3, 6, 8, and 9 I
OH
= –1.0 mA
V
DD
– 0.5
V
Output voltage low
V
OL1
SCK, SO, ports 2, 3, 5, 6, 8,
and 9
I
OL
= 15 mA,
V
DD
= 4.5 to 5.5 V
0.2
2.0
V
I
OL
= 1.6 mA
0.4
V
V
OL2
SB0, SB1
N-ch open-drain
pull-up resistor
≥
1 k
0.2V
DD
V
Input leakage
current high
I
LIH1
V
IN
= V
DD
Other pins than X1
3
μ
A
I
LIH2
X1
20
μ
A
I
LIH3
V
IN
= 13 V
Port 5 (When N-ch open-drain)
20
μ
A
Input leakage
current low
I
LIL1
V
IN
= 0 V
Other pins than port 5 and X1
–3
μ
A
I
LIL2
X1
–20
μ
A
I
LIL3
Port 5 (When N-ch open drain)
Other than when an input instruction
is executed
–3
μ
A
Port 5 (When N-ch open-drain)
When an input instruction
is executed
–30
μ
A
V
DD
= 5.0 V
–10
–27
μ
A
V
DD
= 3.0 V
–3
–8
μ
A
Output leakage
current high
I
LOH1
V
OUT
= V
DD
SCK, SO/SB0, SB1, ports 2, 3, 6, 8
and 9
Port 5 (When a pull-up resistor
is incorporated.)
3
μ
A
I
LOH2
V
OUT
= 13 V
Port 5 (When N-ch open-drain)
20
μ
A
Output leakage
current low
I
LOL
V
OUT
= 0 V
–3
μ
A
On-chip pull-up resistor
R
L1
V
IN
= 0 V
Ports 0 to 3, 6, 8, and 9
(Excluding P00 pin)
50
100
200
k
R
L2
Port 5 (Mask option)
15
30
60
k