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參數(shù)資料
| 型號(hào)： | UPD75304BGF |
| 廠商： | NEC Corp. |
| 英文描述： | 4-BIT SINGLE-CHIP MICROCOMPUTER |
| 中文描述： | 4位單片機(jī) |
| 文件頁數(shù)： | 48/76頁 |
| 文件大?。?/td> | 572K |
| 代理商： | UPD75304BGF |
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48
μ
PD75304B,75306B,75308B
32
32.768
35
kHz
1.0
2
s
XT1
XT2
Leave
Open
10
s
5
15
μ
s
External
clock
Crystal
resonator
SUBSYSTEM CLOCK OSCILLATOR CHARACTERISTICS (Ta = –40 to +85
°
C, V
DD
= 2.0 to 6.0 V)
RECOMMENDED
CONSTANT
TEST
MIN.
TYP.
MAX.
UNIT
RESONATOR
PARAMETER
CONDITIONS
Oscillator
frequency (f
XT
)
V
DD
= 4.5
to 6.0 V
Oscillation
stabilization time
*
XT1 input
frequency (f
XT
)
32
100
kHz
XT1 input high-/
low-level width
(t
XTH
,t
XTL
)
*
This is the time required for oscillation to stabilize after V
DD
reaches the MIN. value of the oscillation voltage
range.
Note
When the main system clock and subsystem clock oscillators are used, the following should be noted
concerning wiring in the area in the figure enclosed by a dotted line to prevent the influence of wiring
capacitance, etc.
The wiring should be kept as short as possible.
No other signal lines should be crossed. Keep away from lines carrying a high fluctuating current.
The oscillator capacitor grounding point should be at the same potential as V
DD
. Do not ground to a
ground pattern carrying a high current.
A signal should not be taken from the oscillator.
The subsystem clock oscillator is a low-amplitude circuit in order to achieve a low consumption
current, and is more prone to misoperation due to noise than the main system clock oscillator. Particu-
lar care is therefore required with the wiring method when the subsystem clock is used.
XT1
XT2
C4
C3
V
DD
R
#
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