
63
μ
PD753012A, 753016A, 753017A
Data Sheet U11662EJ2V0DS00
DC Characteristics (T
A
= –40 to +85
°
C, V
DD
= 1.8 to 5.5 V)
Parameter
Symbol
Conditions
MIN.
TYP.
MAX.
Unit
LCD drive
V
LCD
VAC0 = 0
2.2
V
DD
V
voltage
Note 1
VAC0 = 1
1.8
V
DD
V
VAC current
Note 2
I
VAC
VAC0 = 1, V
DD
= 2.0 V
±
10%
1
4
μ
A
k
k
V
LCD split
R
LCD1
50
100
200
resistor
Note 3
R
LCD2
5
10
20
LCD output voltage
V
ODC
I
O
=
V
LCD0
= V
LCD
0
±
0.2
deviation
Note 4
±
1.0
μ
A
V
LCD1
= V
LCD
×
2/3
V
LCD2
= V
LCD
×
1/3
1.8 V
≤
V
LCD
≤
V
DD
(common)
LCD output voltage
V
ODS
I
O
=
0
±
0.2
V
deviation
Note 4
±
0.5
μ
A
(segment)
Supply
I
DD1
V
DD
= 5.0 V
±
10%
Note 7
V
DD
= 3.0 V
±
10%
Note 8
HALT
V
DD
= 5.0 V
±
10%
V
DD
= 3.0 V
±
10%
V
DD
= 5.0 V
±
10%
Note 7
V
DD
= 3.0 V
±
10%
Note 8
HALT
V
DD
= 5.0 V
±
10%
V
DD
= 3.0 V
±
10%
V
DD
= 3.0 V
±
10%
V
DD
= 2.0 V
±
10%
V
DD
= 3.0 V, T
A
= 25
°
C
V
DD
= 3.0 V
±
10%
V
DD
= 3.0 V, T
A
= 25
°
C
HALT
Low
voltage
mode
Note 10
2.2
6.6
mA
current
Notes 2, 5
0.6
2.0
mA
I
DD2
0.72
2.1
mA
mode
0.27
0.8
mA
I
DD1
1.7
5.1
mA
0.3
0.9
mA
I
DD2
0.7
2.0
mA
mode
0.23
0.7
mA
I
DD3
15
45
μ
A
μ
A
μ
A
μ
A
μ
A
μ
A
μ
A
μ
A
μ
A
μ
A
μ
A
μ
A
μ
A
8
24
15
30
12
36
12
24
I
DD4
V
DD
= 3.0 V
±
10%
8.5
25
mode
V
DD
= 2.0 V
±
10%
4
12
V
DD
= 3.0 V, T
A
= 25
°
C
8.5
17
V
DD
= 3.0 V
±
10%
3.5
12
V
DD
= 3.0 V, T
A
= 25
°
C
3.5
7
I
DD5
XT1 =
V
DD
= 5.0 V
±
10%
V
DD
= 3.0 V
±
10%
0.05
10
0 V
Note 12
0.02
5
STOP mode
T
A
= 25
°
C
0.02
3
Notes 1.
When 1.8 V
≤
V
DD
< 2.7 V, T
A
= –10 to +85
°
C.
Clear VAC0 to 0 in the low current consumption mode and STOP mode. When VAC0 is set to 1, the
current increases by about 1
μ
A.
Either R
LCD1
or R
LCD2
can be selected by mask option.
Voltage deviation is the difference between the ideal values (V
LCDn
; n = 0, 1, 2) of the segment and
common outputs and the output voltage.
The current flowing through the internal pull-up resistor and the LCD divider resistor is not included.
Including the case when the subsystem clock oscillates.
When the device operates in high-speed mode with the processor clock control register (PCC) set to 0011.
When the device operates in low-speed mode with PCC set to 0000.
When the device operates on the subsystem clock, with the system clock control register (SCC) set
to 1001 and oscillation of the main system clock stopped.
10.
When the sub-oscillator control register (SOS) is set to 0000.
11.
When SOS is set to 0010.
12.
When SOS is set to 00X1, and the feedback resistor of the sub-oscillator is not used (X: don’t care).
2.
3.
4.
5.
6.
7.
8.
9.
Low
current
consumption
mode
Note 11
6.00 MHz
Note 6
crystal
oscillation
C1 = C2
= 22 pF
4.19 MHz
Note 6
crystal
oscillation
C1 = C2
= 22 pF
32.768
kHz
Note 9
crystal
oscillation
Low
voltage
mode
Note 10
Low
current
consumption
mode
Note 11