參數(shù)資料
型號: UPD75108AGC
廠商: NEC Corp.
英文描述: 4-BIT SINGLE-CHIP MICROCOMPUTER
中文描述: 4位單片機(jī)
文件頁數(shù): 20/66頁
文件大小: 460K
代理商: UPD75108AGC
μ
PD75104A, 75108A
20
5.2
CLOCK GENERATOR CIRCUIT
The clock generator circuit generates clocks to control CPU operation modes by supplying clocks to the CPU and
peripheral hardware. In addition, this circuit can change the instruction execution time.
0.95
μ
s/1.91
μ
s/15.3
μ
s (operating at 4.19 MHz)
· Basic interval timer (BT)
· Clock output circuit
· Timer/event counter
· Serial interface
f or
XX
f
X
1/2 1/16
1/8 to 1/4096
Frequency divider
X1
X2
System clock
generator
circuit
Oscillation
stops
S
1/4
Frequency
divider
· CPU
· Clock output
circuit
HALT F/F
S
R
Q
PCC
PCC0
PCC1
PCC2
PCC3
4
I
HALT*
STOP*
Clears
PCC2,
PCC3
STOP F/F
Q
S
R
Wait release signal from BT
RES (internal reset) signal
Standby release signal from
interrupt control circuit
Φ
X2
X1
Remarks
1: f
XX
= Crystal/ceramic oscillator
2: f
X
= External clock frequency
3: * indicates the instruction execution
4: PCC: Processor clock control register
5: One clock cycle (t
CY
) of
Φ
is one machine cycle of an instruction. For t
CY
, refer to AC
characteristics in 12. ELECTRICAL SPECIFICATIONS.
Fig. 5-1 Clock Generator Block Diagram
#
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