參數(shù)資料
型號(hào): uPD750064GTA
廠商: NEC Corp.
英文描述: 4-BIT SINGLE-CHIP MICROCONTROLLERS
中文描述: 4位單晶片微控制器
文件頁(yè)數(shù): 24/82頁(yè)
文件大小: 460K
代理商: UPD750064GTA
24
μ
PD750064, 750066, 750068, 750064(A), 750066(A), 750068(A)
Data Sheet U10165EJ2V0DS00
Figure 6-1. Clock Generator Block Diagram
XT1
X1
XT2
X2
f
XT
f
X
Subsystem
clock oscillator
Main system
clock oscillator
4
HALT
Note
STOP
Note
WM.3
SCC
SCC3
SCC0
PCC0
PCC1
PCC2
PCC3
PCC2,
PCC3
Clear
STOP F/F
Q
S
R
Oscillation
stop
HALT F/F
S
R
Wait release signal from BT
RESET signal
Standby release signal from
interrupt control circuit
· CPU
· INT0 noise eliminator
· Clock output circuit
Φ
1/4
Divider
1/1 to 1/4096
Divider
1/21/41/16
· Basic interval timer (BT)
· Timer/event counter
· Serial interface
· Watch timer
· INT0 noise eliminator
· Clock output circuit
PCC
Q
Selector
Selector
I
Watch timer
Note
Instruction execution
Remarks 1.
f
X
= Main system clock frequency
f
XT
= Subsystem clock frequency
Φ
= CPU clock
PCC: Processor Clock Control Register
SCC: System Clock Control Register
One clock cycle (t
CY
) of the CPU clock is equal to one machine cycle of the instruction.
2.
3.
4.
5.
6.
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