參數(shù)資料
型號(hào): UPD70F3033AGF-3BA
廠商: NEC Corp.
英文描述: LJT 56C 48#20 8#16 SKT PLUG
中文描述: V850/SB1TM 32-/16-BIT單晶片微控制器
文件頁數(shù): 25/56頁
文件大?。?/td> 357K
代理商: UPD70F3033AGF-3BA
Data Sheet U14734EJ1V0DS00
25
μ
PD703031A, 703031AY, 703033A, 703033AY, 70F3033A, 70F3033AY
(2) Subsystem clock oscillator (T
A
= –40 to +85°C)
(a) Connection of crystal resonator
XT1
XT2
Parameter
Symbol
Conditions
MIN.
TYP.
MAX.
Unit
Oscillation frequency
f
XT
32
32.768
35
kHz
Oscillation stabilization time
10
s
Cautions 1. Subsystem clock oscillator operates on the output voltage of the on-chip regulator.
External clock input is prohibited.
2. When using the subsystem clock oscillator, wire as follows in the area enclosed by the
broken lines in the above figure to avoid an adverse effect from wiring capacitance.
Keep the wiring length as short as possible.
Do not cross the wiring with the other signal lines.
Do not route the wiring near a signal line through which a high fluctuating current flows.
Always make the ground point of the oscillator capacitor the same potential as V
SS
.
Do not ground the capacitor to a ground pattern through which a high current flows.
Do not fetch signals from the oscillator.
3. Sufficiently evaluate the matching between the
μ
PD703031A, 703031AY, 703033A, 703033AY,
70F3033A, 70F3033AY and the resonator.
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