參數(shù)資料
型號: UPD70208HGK-20-9EU
廠商: NEC Corp.
英文描述: V40HLTM, V50HLTM 16/8, 16-BIT MICROPROCESSOR
中文描述: V40HLTM,V50HLTM 16 / 8,16位微處理器
文件頁數(shù): 41/110頁
文件大?。?/td> 625K
代理商: UPD70208HGK-20-9EU
4
μ
P
D
AC CY V
P
S
Z
Instruc-
tion
Group
D
Mnemonic
Operand(s)
Operation
Operation Code
Flags
7 6 5 4 3 2 1 0
7 6 5 4 3 2 1 0
Clock Cycles
reg
reg’
(mem)
reg
reg
(mem)
(mem)
imm
reg
imm
If W=0: AL
(dmem)
If W=1: AH
(dmem + 1), AL
(dmem)
If W=0: (dmem)
AL
If W=1: (dmem + 1)
AH, (dmem)
AL
sreg
reg16
sreg:SS, DS0, DS1
sreg
(mem16)
sreg:SS, DS0, DS1
reg16
sreg
(mem16)
sreg
reg16
(mem32)
DS0
(mem32 + 2)
reg16
(mem32)
DS1
(mem32 + 2)
AH
S, Z,
×
, AC,
×
, P,
×
, CY
S, Z,
×
, AC,
×
, P,
×
, CY
AH
reg16
mem16
AL
(BW + AL)
reg
reg’
(mem)
reg
AW
reg16
MOV
reg, reg’
mem, reg
reg, mem
mem, imm
reg, imm
acc, dmem
dmem, acc
sreg, reg16
sreg, mem16
reg16, sreg
mem16, sreg
DS0, reg16,
mem32
DS1, reg16,
mem32
AH, PSW
PSW, AH
reg16, mem16
src-table
reg, reg’
mem, reg
reg, mem
AW, reg16
reg16, AW
1 0 0 0 1 0 1 W
1 0 0 0 1 0 0 W
1 0 0 0 1 0 1 W
1 1 0 0 0 1 1 W
1 0 1 1 W reg
1 0 1 0 0 0 0 W
1 0 1 0 0 0 1 W
1 0 0 0 1 1 1 0
1 0 0 0 1 1 1 0
1 0 0 0 1 1 0 0
1 0 0 0 1 1 0 0
1 1 0 0 0 1 0 1
1 1 0 0 0 1 0 0
1 0 0 1 1 1 1 1
1 0 0 1 1 1 1 0
1 0 0 0 1 1 0 1
1 1 0 1 0 1 1 1
1 0 0 0 0 1 1 W
1 0 0 0 0 1 1 W
1 0 0 1 0 reg
1 1
reg
reg’
mod
reg
mem
mod
reg
mem
mod
0 0 0 mem
1 1 0 sreg reg
mod
0
sreg mem
1 1 0 sreg reg
mod
0 sreg mem
mod reg mem
mod reg mem
mod reg mem
1 1 reg reg’
mod reg mem
2
2-4
2-4
3-6
2-3
3
3
2
2-4
2
2-4
2-4
2-4
1
1
2-4
1
2
2-4
1
2
7/11
10/14
9/13
4
10/14
9/13
2
14
2
12
25
25
2
3
4
9
3
13/21
3
XCH
TRANS
LDEA
×
×
×
×
×
Bytes
2
7/11
10/14
9/13
4
10/14
9/13
2
10/14
2
8/12
17/25
17/25
2
3
4
9
3
13/21
3
V40HL V50HL
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