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參數(shù)資料
| 型號： | UPD65MC-XXX-5A4 |
| 英文描述： | MICROCONTROLLER|4-BIT|CMOS|SSOP|20PIN|PLASTIC |
| 中文描述： | 單片機(jī)| 4位|的CMOS | SSOP封裝| 20針|塑料 |
| 文件頁數(shù)： | 24/68頁 |
| 文件大小： | 301K |
| 代理商： | UPD65MC-XXX-5A4 |
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24
μ
PD63, 63A, 64
Table 5-3. Standby Mode Setup (HALT #b
3
b
2
b
1
b
0
B) and Release Conditions
Operand Value of
HALT Instruction
Setting Mode
Precondition for Setup
Release Condition
b
3
b
2
b
1
b
0
0
0
0
0
All K
I/O
pins are high-level output.
High level is input to at least one
of K
I
pins.
0
1
1
STOP
All K
I/O
pins are high-level output.
High level is input to at least one
of K
I
pins.
1
1
0
STOP
Note 1
The K
I/O0
pin is high-level output.
High level is input to at least one
of K
I
pins.
1
Any of the
STOP
[The following condition is added in addition to the above.]
combinations of
—
High level is input to at least one
b
2
b
1
b
0
above
of S
0
and S
1
pins
Note 2
.
0/1
1
0
1
HALT
—
When the timer’s down counter is 0
Notes 1.
When setting HALT #
×
110B, configure a key matrix by using the K
I/O0
pin and the K
I
pin so that an
internal reset takes effect at the time of program hang-up.
2.
At least one of the S
0
and S
1
pins (the pin used for releasing the standby) must be in INPUT mode.
(The internal reset does not take effect even when both pins are in OUTPUT mode.)
Cautions 1. The internal reset takes effect when the HALT instruction is executed with an operand value
other than that above or when the precondition has not been satisfied when executing the
HALT instruction.
2. If STOP mode is set when the timer’s down counter is not 0 (timer operating), the system
is placed in STOP mode only after all the 10 bits of the timer’s down counter and the timer
output permit flag are cleared to 0.
3. Write the NOP instruction as the first instruction after STOP mode is released.
5.3 Standby Mode Release Timing
(1) STOP Mode Release Timing
Figure 5-1. STOP Mode Cancelation by Release Condition
Caution When a release condition is established in the STOP mode, the device is released from the STOP
mode, and goes into a wait state. At this time, if the release condition is not held, the device
goes into STOP mode again after the wait time has elapsed. Therefore, when releasing the STOP
mode, it is necessary to hold the release condition longer than the wait time.
Wait
(52/f
X
+
α
)
HALT mode
OPERATING
mode
STOP mode
Oscillation
stopped
Oscillation
OPERATING
mode
Oscillation
HALT instruction
(STOP mode)
Standby
release signal
Clock
α
: Oscillation growth time
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