參數(shù)資料
型號(hào)： UPD65945
英文描述： CMOS Gate Array.Embedded Array Ver.2.0 for Package | Design Manual[05/2003]
中文描述： CMOS門(mén)陣列Array.Embedded的包版本2.0 |設(shè)計(jì)手冊(cè)[05/2003]
文件頁(yè)數(shù)： 16/64頁(yè)
文件大?。?/td> 399K
代理商： UPD65945
16
μ
PD64A, 65
Data Sheet U14380EJ2V0DS00
3.2 K
I
Port/Special Ports (P1)
3.2.1 K
I
port (P
11
: bits 4-7 of P1)
The K
I
port is to the 4-bit input port for key entry.
The pin state can be read.
Software can be used to set the availability of the pull-down resistor of the K
I
port in 4-bit units by means of bit
5 of the P4 register.
When reset, the pull-down resistor is connected.
Table 3-3. K
I
/Special Port Register (P1)
Bit
b
7
b
6
b
5
b
4
b
3
b
2
b
1
b
0
Name
K
I3
K
I2
K
I1
K
I0
S
1
/LED
S
0
S
2
Fixed to “1”
b
1
b
2
: The state of the S
2
pin is read (Read only).
: In INPUT mode, state of the S
0
pin is read (Read only).
In OFF mode, this bit is fixed to “1”.
: The state of the S
1
/LED pin is read regardless of INPUT/OUTPUT mode (Read only).
: The state of the K
I
pin is read (Read only).
b
3
b
4
-b
7
Caution In order to prevent malfunction, be sure to input a low level to more than one of pins K
I0
to K
I3
when POC is released due to supply voltage startup.
3.2.2 S
0
port (bit 2 of P1)
The S
0
port is an INPUT/OFF mode port.
The pin state can be read by setting this port to INPUT mode with bit 0 of the P4 register.
In INPUT mode, software can be used to set the availability of the pull-down resistor of the S
0
and S
1
/LED port
in 2-bit units by means of bit 4 of the P4 register.
If INPUT mode is released (thus set to OFF mode), the pin becomes high-impedance but it also makes that the
through current does not flow internally. In OFF mode, “1” can be read regardless of the pin state.
When reset, it is set to OFF mode, thus becoming high-impedance.
3.2.3 S
1
/LED (bit 3 of P1)
The S
1
/LED port is an input/output port.
It uses bit 2 of the P4 register to set INPUT or OUTPUT mode. The pin state can be read in both INPUT mode
and OUTPUT mode.
When in INPUT mode, software can be used to set the availability of the pull-down resistor of the S
0
and
S
1
/LED ports in 2-bit units by means of bit 4 of the P4 register.
When in OUTPUT mode, the pull-down resistor is automatically disconnected thus becoming the remote control
transmission display pin (refer to
4. TIMER
).
When reset, it is placed in OUTPUT mode, and high level is output.
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UPD65948 制造商:未知廠家 制造商全稱:未知廠家 功能描述:CMOS Gate Array.Embedded Array Ver.2.0 for Package | Design Manual[05/2003]
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