參數(shù)資料
型號(hào)： UPD65568
英文描述： CMOS-10HD Family Pamphlet | Pamphlet[07/2003]
中文描述： 的CMOS - 10HD系列單張|小冊(cè)子[07/2003]
文件頁(yè)數(shù)： 20/64頁(yè)
文件大?。?/td> 399K
代理商： UPD65568
20
μ
PD64A, 65
Data Sheet U14380EJ2V0DS00
4.2 Timer Operation
The timer starts (counting down) when a value other than 0 is set for the down counter with a timer operation
instruction. The timer operation instructions for making the timer start operation are shown below:
MOV T0, A
MOV T1, A
MOV T, #data10
MOV T, @R0
The down counter is decremented (–1) in the cycle of 64/f
X
or 128/f
X
Note
. If the value of the down counter becomes
0, the zero detecting circuit generates the timer operation end signal to stop the timer operation. At this time, if
the timer is in HALT mode (HALT #
×
101B) waiting for the timer to stop its operation, the HALT mode is released
and the instruction following the HALT instruction is executed. The output of the timer operation end signal is
continued while the down counter is 0 and the timer is stopped. There is the following relational expression between
the timer’s time and the down counter’s set value.
Timer time = (Set value + 1)
×
64/f
X
(or 128/f
X
Note
)
Note
This becomes 128/f
X
if bit 3 of the control register is set (to 1).
By setting 1 for the flag (t
9
) which enables the timer output, the timer can output its operation status from the
S
1
/LED pin and the REM pin. The REM pin can also output the carrier while the timer is in operation.
Table 4-1. Timer Output (at t
9
= 1)
S
1
/LED Pin
REM Pin
Timer operating
Timer halting
L
H
H (or carrier output
Note
)
L
Note
The carrier output results if bit 2 of the control register 0 is cleared (to 0).
Figure 4-2. Timer Output (when carrier is not output)
Timer value: (set value + 1)
×
64/f
X
(or 128/f
X
)
LED
REM
相關(guān)PDF資料
PDF描述
UPD65569 CMOS Gate Array.Embedded Array Ver.2.0 for Package | Design Manual[05/2003]
UPD65570 CMOS-10HD Family Pamphlet | Pamphlet[07/2003]
UPD65648-QFP160P1.2SQ ASIC
UPD65650-QFP100P.63SQ ASIC
UPD65650-QFP100P.7X.9 ASIC
相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
UPD65569 制造商:未知廠家 制造商全稱(chēng):未知廠家 功能描述:CMOS Gate Array.Embedded Array Ver.2.0 for Package | Design Manual[05/2003]
UPD65570 制造商:未知廠家 制造商全稱(chēng):未知廠家 功能描述:CMOS-10HD Family Pamphlet | Pamphlet[07/2003]
UPD65571 制造商:未知廠家 制造商全稱(chēng):未知廠家 功能描述:CMOS Gate Array.Embedded Array Ver.2.0 for Package | Design Manual[05/2003]
UPD65612 制造商:NEC 制造商全稱(chēng):NEC 功能描述:CMOS-6/6A/6V/6X 1.0-MICRON CMOS GATE ARRAYS
UPD65612GB043 制造商:NEC 功能描述:*
發(fā)布緊急采購(gòu)，3分鐘左右您將得到回復(fù)。

采購(gòu)需求

(若只采購(gòu)一條型號(hào)，填寫(xiě)一行即可)

發(fā)布成功！您可以繼續(xù)發(fā)布采購(gòu)。也可以進(jìn)入我的后臺(tái)，查看報(bào)價(jià)

發(fā)布成功！您可以繼續(xù)發(fā)布采購(gòu)。也可以進(jìn)入我的后臺(tái)，查看報(bào)價(jià)

*型號(hào) *數(shù)量 廠商 批號(hào) 封裝
添加更多采購(gòu)

我的聯(lián)系方式

*
*
*