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參數(shù)資料
| 型號： | UPD4992GS-T1 |
| 廠商： | NEC Corp. |
| 英文描述： | 8-Bit Parallel I/O Calendar Clock |
| 中文描述： | 8位并行I / O時鐘日歷 |
| 文件頁數(shù)： | 12/16頁 |
| 文件大?。?/td> | 101K |
| 代理商： | UPD4992GS-T1 |
μ
PD4992
12
TP OUTPUT (mode register: TP output mode)
BUSY SIGNAL
TP output
DISABLE set
1s carry over
Internal counter
1 Hz
457.7 s
BUSY flag
ON
BUSY flag
OFF
BUSY flag
ON
Busy
signal output
1s carry over
30.5 s
The time and calendar data read out when BUSY signal is being output may not be correct. This is because, the
internal time counter is operating. Therefore, accessing must be disabled during this period or the data must be read
out twice and checked by the software. (Reading data during BUSY period has not effect on the contents of the internal
counter.)
1 / f
50 % duty continuous output
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