參數(shù)資料
型號(hào)： UPD488448FB-C60-53-DQ2
廠商： NEC Corp.
英文描述： 128 M-bit Direct Rambus⑩ DRAM
中文描述： 128 M位DRAM的直接Rambus的⑩
文件頁(yè)數(shù)： 21/80頁(yè)
文件大?。?/td> 1902K
代理商： UPD488448FB-C60-53-DQ2
Data Sheet M14837EJ3V0DS00
21
μ
PD488448 for Rev. P
9. COL-to-ROW Packet Interaction
Figure 9-1 shows arbitrary packets on the COL
and ROW pins. They must be separated by an
interval t
CRDELAY
which depends upon the
command and address values in the packets.
Table 9-1 summarizes the t
CRDELAY
value for all
possible cases.
Cases CR1, CR2, CR3, and CR9 show no
interaction between the COL and ROW packets,
either because one of the commands is a NOP or
because the packets are directed to different
devices or to non-adjacent banks.
Case CR4 is illegal because an already-activated
bank is to be re-activated without being
precharged. Case CR5 is illegal because an
adjacent bank can’t be activated or precharged
until bank Ba is precharged first.
In case CR6, the COLC packet contains a RD command, and the ROW packet contains a PRER command for the
same bank. The t
RDP
parameter specifies the required spacing.
Likewise, in case CR7, the COLC packet causes an automatic retire to take place, and the ROW packet contains a
PRER command for the same bank. The t
RTP
parameter specifies the required spacing.
Case CR8 is labeled “Hazardous” because a WR command should always be followed by an automatic retire before
a precharge is scheduled. Figure 15-3 shows an example of what can happen when the retire is not able to happen
before the precharge.
For the purposes of analyzing COL-to-ROW interactions, the PREC, WRA, and RDA commands of the COLC
packet are equivalent to the NOCOP, WR, and RD commands. These commands also cause a precharge operation
to take place. This precharge may converted to an equivalent PRER command on the ROW pins using the rules
summarized in Figure 12-2.
A ROW packet may contain commands other than ACT or PRER. The REFA and REFP commands are equivalent
to ACT and PRER for interaction analysis purposes. The interaction rules of the NAPR, PDNR, and RLXR
commands are discussed in a later section.
Table 9-1 COL-to-ROW Packet Interaction - Rules
Case #
COPa
Da
Ba
Ca1
ROPb
Db
Bb
Rb
t
CRDELAY
Example
CR1
CR2
CR3
CR4
CR5
NOCOP
RD/WR
RD/WR
RD/WR
RD/WR
Da
Da
Da
Da
Da
Ba
Ba
Ba
Ba
Ba
Ca1
Ca1
Ca1
Ca1
Ca1
x..x
x..x
x..x
ACT
ACT
xxxxx
/= Da
== Da
== Da
== Da
xxxxx
xxxxx
/= {Ba, Ba+1, Ba-1} x..x
== {Ba}
== {Ba+1, Ba-1}
x..x
x..x
0
0
0
Illegal
Illegal
x..x
x..x
CR6
CR7
CR8
CR9
RD
retire
WR
xxxx
Da
Da
Da
Da
Ba
Ba
Ba
Ba
Ca1
Ca1
Ca1
Ca1
PRER
PRER
PRER
NOROP xxxxx
== Da
== Da
== Da
== {Ba, Ba+1, Ba-1} x..x
== {Ba, Ba+1, Ba-1} x..x
== {Ba, Ba+1, Ba-1} x..x
xxxxx
t
RDP
t
RTP
0
0
Figure 13-1
Figure 14-1
Figure 15-3
Note 1
Note 2
x..x
Notes 1.
This is any command which permits the write buffer of device Da to retire (see Table 3-3). “Ba” is the bank
address in the write buffer.
2.
This situation is hazardous because the write buffer will be left unretired while the targeted bank is
precharged. See Figure 15-3.
Figure 9-1 COL-to-ROW Packet Interaction- Timing
CTM/CFM
DQA7..0
DQB7..0
COL4
..COL0
ROW2
..ROW0
T
0
T
4
T
8
T
12
T
1
T
5
T
9
T
13
T
2
T
6
T
10
T
14
T
3
T
7
T
11
T
15
T
16
T
T
17
T
18
T
19
Transaction a: COPa
Transaction b: ROPb
a1= {Da,Ba,Ca1}
b0= {Db,Bb,Rb}
t
CRDELAY
ROPb b0
COPa a1
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