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參數(shù)資料
| 型號： | UPD4632312AF9-B65X-BC2 |
| 廠商： | NEC Corp. |
| 英文描述： | 32M-BIT CMOS MOBILE SPECIFIED RAM 2M-WORD BY 16-BIT EXTENDED TEMPERATURE OPERATION |
| 中文描述： | 32兆位CMOS移動指明內存200萬字由16位溫度范圍 |
| 文件頁數(shù)： | 18/36頁 |
| 文件大?。?/td> | 320K |
| 代理商： | UPD4632312AF9-B65X-BC2 |
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Preliminary Data Sheet M15874EJ5V0DS
18
μ
PD4632312A-X
Write Cycle
Parameter
Symbol
-B60X
-B65X
-BE75X
-BE85X
Unit
Note
MIN.
MAX.
MIN.
MAX.
MIN.
MAX.
MIN.
MAX.
Write cycle time
t
WC
65
65
75
85
ns
/CS to end of write
t
CW
55
55
60
70
ns
Address valid to end of write
t
AW
55
55
60
70
ns
/LB, /UB to end of write
t
BW
55
55
60
70
ns
Write pulse width
t
WP
50
50
55
60
ns
Write recovery time
t
WR
0
0
0
0
ns
/CS pulse width
t
CP
10
10
10
10
ns
/LB, /UB high level pulse width
t
BP
10
10
10
10
ns
/WE high level pulse width
t
WHP
10
10
10
10
ns
Address setup time
t
AS
0
0
0
0
ns
/OE high level to address hold
t
OHAH
–5
–5
–5
–5
ns
/CS high level to address hold
t
CHAH
0
0
0
0
ns
1
/LB, /UB high level to address hold
t
BHAH
0
0
0
0
ns
1, 2
Data valid to end of write
t
DW
30
30
35
35
ns
Data hold time
t
DH
0
0
0
0
ns
/OE high level to /WE set
t
OES
0
10,000
0
10,000
0
10,000
0
10,000
ns
3
/WE high level to /OE set
t
OEH
10
10,000
10
10,000
10
10,000
10
10,000
ns
Notes 1.
When t
AS
≥
| t
CHAH
|, | t
BHAH
| and t
CP
≥
18 ns, t
CHAH
and t
BHAH
(MIN.) are –15 ns.
t
CHAH
, t
BHAH
t
AS
/LB, /UB, /CS (Input)
Address (Input)
/WE (Input)
2.
t
BHAH
is specified from when both /LB and /UB become high level.
3.
t
OES
and t
OEH
(MAX.) are applied while /CS is being hold at low level.
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